用于SystemC和Verilog之间转换的高性能双向编译器

Chenyu Huang, Huaien Gao, Yongfeng Zhong, Shuting Cai
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引用次数: 1

摘要

随着芯片设计技术的不断发展,许多芯片描述语言不断涌现。Verilog和SystemC在芯片描述中都起着重要的作用。Verilog是一种广泛使用的硬件描述语言,可用于硬件设计过程的多个阶段,包括建模、综合和仿真。同时,为了缩短芯片的设计周期,使用SystemC进行硬件设计和建模已成为一种趋势。因此,我们需要为此在两者之间进行转换,即Verilog And SystemC(VASC),被提出。实验表明,与现有的开源工具相比,VASC具有良好的准确性和更快的编译速度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A High-Performance Bidirectional Compiler for Conversion Between SystemC and Verilog
With the continuous development of chip design technology, many chip description languages continuously emerge. Both Verilog and SystemC play an important role in chip description. Verilog is a widely used hardware description language that can be used in multiple stages of the hardware design process, including modeling, synthesis, and simulation. At the same time, to shorten the design cycle of chips, it has become a trend to use SystemC for hardware design and modeling. Therefore, we need to this end to convert between the two, namely Verilog And SystemC(VASC), is proposed. Experiments show that, compared to existing open-source tools, the VASC has excellent accuracy and faster compilation speed.
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