{"title":"多标准射频分采样接收机射频滤波器的设计与优化","authors":"R. Barrak, Adel Ghazel, F. Ghannouchi","doi":"10.1109/DTIS.2006.1708662","DOIUrl":null,"url":null,"abstract":"This paper presents an improved sampling-based down conversion topology design with double RF filters for multi-standard RF subsampling receiver. Proposed architecture is limiting down conversion to IF domain and adding a first tunable RF filter to select multistandard RF bands. To overcome subsampling negative effects on receiver performances a second RF filter is inserted before subsampling operation to perform anti-aliasing and limit wide band noise. RF filters design methodology and ADS simulation results are presented for GSM, UMTS and IEEE-802.11g standards. Good performance improvement is obtained with reduced complexity architecture and circuits","PeriodicalId":399250,"journal":{"name":"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Design and optimisation of RF filters for multistandard RF sub-sampling receiver\",\"authors\":\"R. Barrak, Adel Ghazel, F. Ghannouchi\",\"doi\":\"10.1109/DTIS.2006.1708662\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an improved sampling-based down conversion topology design with double RF filters for multi-standard RF subsampling receiver. Proposed architecture is limiting down conversion to IF domain and adding a first tunable RF filter to select multistandard RF bands. To overcome subsampling negative effects on receiver performances a second RF filter is inserted before subsampling operation to perform anti-aliasing and limit wide band noise. RF filters design methodology and ADS simulation results are presented for GSM, UMTS and IEEE-802.11g standards. Good performance improvement is obtained with reduced complexity architecture and circuits\",\"PeriodicalId\":399250,\"journal\":{\"name\":\"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-10-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DTIS.2006.1708662\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS.2006.1708662","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and optimisation of RF filters for multistandard RF sub-sampling receiver
This paper presents an improved sampling-based down conversion topology design with double RF filters for multi-standard RF subsampling receiver. Proposed architecture is limiting down conversion to IF domain and adding a first tunable RF filter to select multistandard RF bands. To overcome subsampling negative effects on receiver performances a second RF filter is inserted before subsampling operation to perform anti-aliasing and limit wide band noise. RF filters design methodology and ADS simulation results are presented for GSM, UMTS and IEEE-802.11g standards. Good performance improvement is obtained with reduced complexity architecture and circuits