W.-C. Chen, F. Huang, S. Qin, Z. Yu, Q. Lin, P. McIntyre, S. Wong, H. P. Wong
{"title":"高密度嵌入式非易失性存储器的4bit /cell混合1F1R及其在内存计算中的应用","authors":"W.-C. Chen, F. Huang, S. Qin, Z. Yu, Q. Lin, P. McIntyre, S. Wong, H. P. Wong","doi":"10.1109/vlsitechnologyandcir46769.2022.9830242","DOIUrl":null,"url":null,"abstract":"We present 1-FeFET-1-RRAM (1F1R) hybrid nonvolatile memory for dense embedded memory application. By allocating 2 bits each in the RRAM and FeFET, we show 4 bits/cell capability with retention over 104 seconds at 85 °C. An array of 1F1R cells enables a new compute-in-memory (CIM) concept – Masked CIM. Masked CIM can store 2× the amount of signed weights compared with traditional CIM array. Doubling synapses density allows implementing larger neural network models that is critical for applications beyond toy datasets such as MNIST or CIFAR-10.","PeriodicalId":332454,"journal":{"name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"4 Bits/cell Hybrid 1F1R for High Density Embedded Non-Volatile Memory and its Application for Compute in Memory\",\"authors\":\"W.-C. Chen, F. Huang, S. Qin, Z. Yu, Q. Lin, P. McIntyre, S. Wong, H. P. Wong\",\"doi\":\"10.1109/vlsitechnologyandcir46769.2022.9830242\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present 1-FeFET-1-RRAM (1F1R) hybrid nonvolatile memory for dense embedded memory application. By allocating 2 bits each in the RRAM and FeFET, we show 4 bits/cell capability with retention over 104 seconds at 85 °C. An array of 1F1R cells enables a new compute-in-memory (CIM) concept – Masked CIM. Masked CIM can store 2× the amount of signed weights compared with traditional CIM array. Doubling synapses density allows implementing larger neural network models that is critical for applications beyond toy datasets such as MNIST or CIFAR-10.\",\"PeriodicalId\":332454,\"journal\":{\"name\":\"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830242\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830242","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
4 Bits/cell Hybrid 1F1R for High Density Embedded Non-Volatile Memory and its Application for Compute in Memory
We present 1-FeFET-1-RRAM (1F1R) hybrid nonvolatile memory for dense embedded memory application. By allocating 2 bits each in the RRAM and FeFET, we show 4 bits/cell capability with retention over 104 seconds at 85 °C. An array of 1F1R cells enables a new compute-in-memory (CIM) concept – Masked CIM. Masked CIM can store 2× the amount of signed weights compared with traditional CIM array. Doubling synapses density allows implementing larger neural network models that is critical for applications beyond toy datasets such as MNIST or CIFAR-10.