同步降压变换器设计优化综述

2008 12th International Middle-East Power System Conference Pub Date : 2008-03-12 DOI:10.1109/MEPCON.2008.4562398

M. el-Zanaty, M. Orabi, M. El-Sadek

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引用次数: 5

摘要

如今，电源设计人员面临的主要问题是为上一代微处理器和dsp提供电源，因为它们需要高电流转换率和低输出电压。本文介绍了用于此类应用的降压变换器的设计步骤。同时也明确了采用高开关频率的优点。实验结果验证了仿真和分析的正确性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Review of synchronous buck converter design optimization

Nowadays, the main important issue for power supplies designers is to feed last generation of microprocessors and DSPs, since they require high current slew rates on accompain with low output voltage. This paper introduces the design steps for a buck converter used in that kind of applications. Also, the advantage of applying high switching frequency has been made clear. Experimental results have been obtained to verify simulation and analysis.

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2008 12th International Middle-East Power System Conference

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