基于并行异构架构的优化MPEG-4解码器实现的快速原型

N. Ventroux, J. Nezan, M. Raulet, O. Déforges
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引用次数: 3

摘要

实际上,为单个处理器开发的顺序MPEG-4解决方案试图在一个独特的软件中集成尽可能多的功能,与实际的服务需求相比,通常是过大的。此外,它们很难被投射到多处理器目标上,这会导致额外的源代码和计算负载,而且还会导致架构并行性的次优使用。本文介绍了一种分布式MPEG-4应用,其中系统部分由标准PC机托管,视频解码器由多dsp板支持。特别是,我们提出了AVSynDEx方法,允许增量构建,视频解码器描述的简单更新,以及在多c6x平台上的准自动实现。我们还定义了一个全局调度程序来管理视频和系统应用程序的并行执行。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Rapid prototyping for an optimized MPEG-4 decoder implementation over a parallel heterogenous architecture
Sequential MPEG-4 solutions actually developed for single processors try to integrate the most functionalities as possible in an unique software, and are generally oversized compared with the actual service requirement. Moreover, they can hardly be projected onto multiprocessors targets, leading to an extra load of source code and calculations, but also to a sub-optimal use of the architecture parallelism. This paper introduces a distributed MPEG-4 application, where the system part is hosted by a standard PC, and the video decoder is supported by a multi-DSPs board. In particular, we present our AVSynDEx methodology allowing both an incremental building, an easy update on the video decoder description, and a quasi-automatic implementation onto a multi-C6x platform. We also define a global scheduler managing the parallel execution of the video and system applications.
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