薄膜电子学的电弧蚀刻金属图案

Aswathi R. Nair, S. Sambandan
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引用次数: 0

摘要

本文讨论了一种用于薄膜晶体管的金属薄膜图像化新技术。这是一种卷对卷兼容的图案化技术,涉及在金属电极和金属薄膜之间形成电弧放电。电弧放电导致金属薄膜在很窄的区域内蚀刻。初步研究表明,在施加电压为100V时,可形成特征尺寸小至30μm的蚀刻区域。此外,通过使用标准阴影掩膜方法和所提出的电弧蚀刻方法对金属进行图图化来制造金属-半导体-金属结构。两种情况下的电流-电压特性的比较证明了使用电弧蚀刻作为一种适用于薄膜晶体管的源极-漏极图像化技术的可能性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Metal Patterning via Arc Etching for Thin Film Electronics
This paper discusses a novel technique for patterning metal thin film for thin film transistor applications. This is a roll to roll compatible patterning technique which involves the formation of an arc discharge between a metal electrode and the metal thin film. The arc discharge results in the etching of metal thin film in a very narrow region. Preliminary studies indicate the formation of etched regions having feature size as small as 30μm at an applied voltage of 100V. Further, a metal-semiconductor-metal structure is fabricated by patterning the metal using both the standard shadow mask method and the proposed arc etching method. A comparison between the current-voltage characteristics in both cases demonstrate the possibility of using arc etching as a source-drain patterning technique suitable for thin film transistors.
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