K. Hass, G. Donohoe, Y. Hong, B. Choi, K. DeGregorio, R. Hayhurst
{"title":"磁影内存","authors":"K. Hass, G. Donohoe, Y. Hong, B. Choi, K. DeGregorio, R. Hayhurst","doi":"10.1109/NVMT.2006.378874","DOIUrl":null,"url":null,"abstract":"We propose a new shadow RAM circuit, utilizing magnetic tunnel junctions and an independent-double-gate CMOS technology. A shadow RAM combines a conventional static RAM circuit with a non-volatile \"shadow\", and provides a means to quickly transfer data between them. Non-volatile magnetic storage offers several advantages over current technology for this application, with unlimited write endurance, very fast write time, low power consumption, and improved radiation tolerance. A novel circuit allows the shadow storage to be incorporated into a RAM cell using independent-double- gate transistors. The physical layout of the shadow RAM is unlike bulk MRAM, making it possible to embed the shadow RAM elements into computational logic without the X-Y grid decoding of the cell address. Accordingly, the micromagnetic structures have been optimized for writing with a new \"one- wire\" technique. We discuss proposed circuits and present circuit simulation results.","PeriodicalId":263387,"journal":{"name":"2006 7th Annual Non-Volatile Memory Technology Symposium","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"Magnetic Shadow RAM\",\"authors\":\"K. Hass, G. Donohoe, Y. Hong, B. Choi, K. DeGregorio, R. Hayhurst\",\"doi\":\"10.1109/NVMT.2006.378874\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We propose a new shadow RAM circuit, utilizing magnetic tunnel junctions and an independent-double-gate CMOS technology. A shadow RAM combines a conventional static RAM circuit with a non-volatile \\\"shadow\\\", and provides a means to quickly transfer data between them. Non-volatile magnetic storage offers several advantages over current technology for this application, with unlimited write endurance, very fast write time, low power consumption, and improved radiation tolerance. A novel circuit allows the shadow storage to be incorporated into a RAM cell using independent-double- gate transistors. The physical layout of the shadow RAM is unlike bulk MRAM, making it possible to embed the shadow RAM elements into computational logic without the X-Y grid decoding of the cell address. Accordingly, the micromagnetic structures have been optimized for writing with a new \\\"one- wire\\\" technique. We discuss proposed circuits and present circuit simulation results.\",\"PeriodicalId\":263387,\"journal\":{\"name\":\"2006 7th Annual Non-Volatile Memory Technology Symposium\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 7th Annual Non-Volatile Memory Technology Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NVMT.2006.378874\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 7th Annual Non-Volatile Memory Technology Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NVMT.2006.378874","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We propose a new shadow RAM circuit, utilizing magnetic tunnel junctions and an independent-double-gate CMOS technology. A shadow RAM combines a conventional static RAM circuit with a non-volatile "shadow", and provides a means to quickly transfer data between them. Non-volatile magnetic storage offers several advantages over current technology for this application, with unlimited write endurance, very fast write time, low power consumption, and improved radiation tolerance. A novel circuit allows the shadow storage to be incorporated into a RAM cell using independent-double- gate transistors. The physical layout of the shadow RAM is unlike bulk MRAM, making it possible to embed the shadow RAM elements into computational logic without the X-Y grid decoding of the cell address. Accordingly, the micromagnetic structures have been optimized for writing with a new "one- wire" technique. We discuss proposed circuits and present circuit simulation results.