1.3 V 30mw 8-BIT 166ms /s A/D转换器，0.18 μm CMOS，参考发生器

2006 IEEE International SOC Conference Pub Date : 2006-09-01 DOI:10.1109/SOCC.2006.283866

Li Jing-hu, Yu Ming-yan, Wang Yong-sheng, W. Jin-xiang

{"title":"1.3 V 30mw 8-BIT 166ms /s A/D转换器，0.18 μm CMOS，参考发生器","authors":"Li Jing-hu, Yu Ming-yan, Wang Yong-sheng, W. Jin-xiang","doi":"10.1109/SOCC.2006.283866","DOIUrl":null,"url":null,"abstract":"An 8-bit analog-to-digital (A/D) converter from 1.3 V supply voltage in 0.18 mum CMOS technology without use of low-threshold MOS transistor is presented. The A/D converter features a low voltage reference generator, modified pipeline chopper amplifier and pre-equalized comparator. Simulation result shows the A/D converter achieves + 0.17 LSB differential nonlinearity (DNL), + 0.34 LSB integral nonlinearity (INL) and 48 dB SNDR at 166 MHz sampling rate with 1.79 MHZ sinusoidal input. The total power consumption is 30 mW.","PeriodicalId":345714,"journal":{"name":"2006 IEEE International SOC Conference","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 1.3 V 30-mW 8-BIT 166-MS/s A/D Converter in 0.18 μm CMOS with Reference Generator\",\"authors\":\"Li Jing-hu, Yu Ming-yan, Wang Yong-sheng, W. Jin-xiang\",\"doi\":\"10.1109/SOCC.2006.283866\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An 8-bit analog-to-digital (A/D) converter from 1.3 V supply voltage in 0.18 mum CMOS technology without use of low-threshold MOS transistor is presented. The A/D converter features a low voltage reference generator, modified pipeline chopper amplifier and pre-equalized comparator. Simulation result shows the A/D converter achieves + 0.17 LSB differential nonlinearity (DNL), + 0.34 LSB integral nonlinearity (INL) and 48 dB SNDR at 166 MHz sampling rate with 1.79 MHZ sinusoidal input. The total power consumption is 30 mW.\",\"PeriodicalId\":345714,\"journal\":{\"name\":\"2006 IEEE International SOC Conference\",\"volume\":\"62 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International SOC Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2006.283866\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2006.283866","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

提出了一种采用0.18 μ m CMOS技术，在1.3 V电源电压下，不使用低阈值MOS晶体管的8位模数转换器。A/D转换器具有低压基准发生器，改进的管道斩波放大器和预均衡比较器。仿真结果表明，在166mhz采样率和1.79 MHz正弦输入条件下，A/D转换器实现了+ 0.17 LSB的微分非线性和+ 0.34 LSB的积分非线性，SNDR为48 dB。总功耗为30mw。

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A 1.3 V 30-mW 8-BIT 166-MS/s A/D Converter in 0.18 μm CMOS with Reference Generator

An 8-bit analog-to-digital (A/D) converter from 1.3 V supply voltage in 0.18 mum CMOS technology without use of low-threshold MOS transistor is presented. The A/D converter features a low voltage reference generator, modified pipeline chopper amplifier and pre-equalized comparator. Simulation result shows the A/D converter achieves + 0.17 LSB differential nonlinearity (DNL), + 0.34 LSB integral nonlinearity (INL) and 48 dB SNDR at 166 MHz sampling rate with 1.79 MHZ sinusoidal input. The total power consumption is 30 mW.

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2006 IEEE International SOC Conference

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