余数系统中模块化乘法器的FPGA实现

Yinan Kong, Md. Selim Hossain
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引用次数: 6

摘要

本文介绍了利用剩余数系统(RNS)实现Montgomery模乘法器的高性能硬件实现。RNS可以被认为是对简单功率分析(SPA)和差分功率分析(DPA)攻击的自卫,并且可以用于公钥加密,例如Rivest, Shamir和Adleman (RSA)密码系统和椭圆曲线密码系统(ECC)。大数据分析需要各种安全保障。提出的基于rns的模块化乘法器适用于可用于大数据安全的公钥加密。该算法在现场可编程门阵列(FPGA)技术上实现,并通过在其上尝试不同变体的Montgomery算法进行优化。在Xilinx Virtex-II FPGA上,提出的基于rns的模块化乘法只需22ns。此外,它在FPGA上需要相对较少的资源,只需要68片。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
FPGA Implementation of Modular Multiplier in Residue Number System
This work presents a description of a highperformance hardware implementation of a Montgomery modular multiplier using a residue number system (RNS). An RNS can be considered as self-defense against simple power analysis (SPA) and differential power analysis (DPA) attacks, and can be used for public-key cryptography, such as the Rivest, Shamir and Adleman (RSA) cryptosystem and elliptic curve cryptosystems (ECC). Various kinds of security are required for Big Data analysis. The proposed RNS-based modular multiplier is suitable for public-key cryptography that can be used for Big Data security. It is implemented on field-programmable gate-array (FPGA) technology and optimized by trying different variants of the Montgomery Algorithm on it. The proposed RNS-based modular multiplication takes only 22 ns on the Xilinx Virtex-II FPGA. In addition, it needs relatively few resources on the FPGA, needing only 68 slices.
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