一种用于低功耗、高速CMOS电路的改进通型晶体管合成方法

ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514) Pub Date : 2000-08-01 DOI:10.1145/344166.344541

Tudor Vinereanu, S. Lidholm

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引用次数: 1

摘要

提出了一种生成混合通-门电路的综合方法。这些电路结合了互补CMOS和通栅极架构的特点。采用0.7 /spl mu/m技术的仿真结果表明，与传统的全摆通晶体管逻辑和互补CMOS相比，根据该方法合成的电路在面积、功耗和延迟方面都有显著改善。

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An improved pass transistor synthesis method for low power, high speed CMOS circuits

A synthesis method for generating hybrid pass gate circuits is presented. These circuits combine features from both complementary CMOS and pass gates architectures. The simulation results using a 0.7 /spl mu/m technology show that circuits synthesized according to the proposed method may achieve significant improvements in terms of area, power and delay over traditional full swing pass transistor logic and complementary CMOS.

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来源期刊

ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514)

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