{"title":"减少过程调用开销:优化过程调用时的寄存器使用","authors":"F. Lai, Chia-Jung Hsieh","doi":"10.1109/ICPADS.1994.590416","DOIUrl":null,"url":null,"abstract":"Proposes a common global variable reassignment and an integrated approach which takes advantage of the complementary relationship of (1) in-lining and (2) interprocedural register allocation to reduce the procedure call overhead without causing any additional negative effect. Our approach is based on the observation of analyzed program characteristics to identify the heavily called procedure regions, and on register usage information to optimize the placement of resister save/restore code. This method also takes full advantage of free-use registers at each procedure call site. The average performance improvement is 1.233 compared with previous schemes that performed either (1) or (2) independently.","PeriodicalId":154429,"journal":{"name":"Proceedings of 1994 International Conference on Parallel and Distributed Systems","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Reducing procedure call overhead: optimizing register usage at procedure calls\",\"authors\":\"F. Lai, Chia-Jung Hsieh\",\"doi\":\"10.1109/ICPADS.1994.590416\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Proposes a common global variable reassignment and an integrated approach which takes advantage of the complementary relationship of (1) in-lining and (2) interprocedural register allocation to reduce the procedure call overhead without causing any additional negative effect. Our approach is based on the observation of analyzed program characteristics to identify the heavily called procedure regions, and on register usage information to optimize the placement of resister save/restore code. This method also takes full advantage of free-use registers at each procedure call site. The average performance improvement is 1.233 compared with previous schemes that performed either (1) or (2) independently.\",\"PeriodicalId\":154429,\"journal\":{\"name\":\"Proceedings of 1994 International Conference on Parallel and Distributed Systems\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-12-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1994 International Conference on Parallel and Distributed Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICPADS.1994.590416\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1994 International Conference on Parallel and Distributed Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICPADS.1994.590416","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Reducing procedure call overhead: optimizing register usage at procedure calls
Proposes a common global variable reassignment and an integrated approach which takes advantage of the complementary relationship of (1) in-lining and (2) interprocedural register allocation to reduce the procedure call overhead without causing any additional negative effect. Our approach is based on the observation of analyzed program characteristics to identify the heavily called procedure regions, and on register usage information to optimize the placement of resister save/restore code. This method also takes full advantage of free-use registers at each procedure call site. The average performance improvement is 1.233 compared with previous schemes that performed either (1) or (2) independently.