一种采用28nm cmos芯片的0.9V三阶单opamp模拟滤波器

M. Matteis, A. Donno, Stefano Marinaci, S. D’Amico, A. Baschirotto
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引用次数: 5

摘要

提出了一种基于28nm cmos本体技术的三阶132MHz截止频率低通滤波器。28nm cmos体制程节点模拟电路设计的挑战已经在架构和电路设计层面面临并得到缓解。该滤波器基于改进的有源-gm- rc结构,其中米勒补偿的Opamp的两个极点用于合成三阶滤波器传递函数。所提出的电路解决方案即使在电源电压限制为0.9V的情况下也能实现高线性度(在21和22mhz输入音调下IIP3=11.5dBm)。此外,功耗保持在低至340μ\ν,而不影响信噪比(60dB)。达到的性能因数为164dB,在最先进的技术中排名最高。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 0.9V 3rd-order single-OPAMP analog filter in 28nm CMOS-bulk
A 3rd-order 132MHz cut-off frequency low-pass filter in 28nm CMOS-bulk technology is presented. Challenges related to the design of analog circuits in 28nm CMOS-bulk process node have been faced and mitigated operating at both architecture and circuit design level. The filter is based on an improved Active-gm-RC structure, where both poles of a Miller-compensated Opamp have been used for synthesizing the 3rd order filter transfer function. The proposed circuit solution enables high linearity (IIP3=11.5dBm at 21&22MHz input tones) even if the supply voltage is limited to 0.9V. Moreover, the power consumption is kept as low as 340μ\ν without that the Signal-to-Noise ratio (60dB) is penalized. The achieved Figure-of-Merit is 164dB resulting the highest with respect to the state-of-the-art.
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