{"title":"集成的MSI交叉点阵列","authors":"J. Blachere, C. Benichou, H. Braquet","doi":"10.1109/ESSCIRC.1980.5468800","DOIUrl":null,"url":null,"abstract":"A 144 elements array of transistor crosspoints has been realized. It achieves low insertion loss and high dynamic breakdown using a conventional bipolar technology. The chip measures 4.3 × 4.1 mm2 and is mounted on a 76 pins substrate.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An Integrated MSI Crosspoints Array\",\"authors\":\"J. Blachere, C. Benichou, H. Braquet\",\"doi\":\"10.1109/ESSCIRC.1980.5468800\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 144 elements array of transistor crosspoints has been realized. It achieves low insertion loss and high dynamic breakdown using a conventional bipolar technology. The chip measures 4.3 × 4.1 mm2 and is mounted on a 76 pins substrate.\",\"PeriodicalId\":168272,\"journal\":{\"name\":\"ESSCIRC 80: 6th European Solid State Circuits Conference\",\"volume\":\"41 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1980-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 80: 6th European Solid State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.1980.5468800\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 80: 6th European Solid State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1980.5468800","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 144 elements array of transistor crosspoints has been realized. It achieves low insertion loss and high dynamic breakdown using a conventional bipolar technology. The chip measures 4.3 × 4.1 mm2 and is mounted on a 76 pins substrate.