K. Watanabe, A. Koyama, T. Harada, T. Aida, A. Ito, T. Murata, H. Yoshioka, M. Sonehara, H. Yamashita, K. Ishikawa, M. Ito, N. Shiramizu, T. Nakamura, K. Ohhata, F. Arakawa, T. Kusunoki, H. Chiba, T. Kurihara, M. Kuraishi
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A low-jitter 16:1 MUX and a high-sensitivity 1:16 DEMUX with integrated 39.8 to 43GHz VCO for OC-768 communication systems
A fully integrated 39.8 to 43Gb/s OC-768 16:1 MUX/DEMUX chipset is implemented in a 0.18/spl mu/m BiCMOS process. Full-rate operation is realized with an on-chip VCO, and the chipset dissipates 11.6W. The measured output jitter of the packaged MUX is 630fs, and the sensitivity of DEMUX is 31 mV/sub PP/ single-ended with a BER <10/sup -12/.
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