MIComp:三维片上磁感应计算,同时具有无线信息和电力传输

B. Gulbahar, Gorkem Memisoglu
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引用次数: 0

摘要

片上计算平台的瓶颈包括晶体管缩放的成本和物理限制、通信瓶颈、能效和内存的速度成本。三维(3D)设计、碳纳米管材料、基于忆阻器的神经形态计算以及光学、射频和磁感应(MI)无线通信解决方案最近被提出。通过形成耦合网络,MI通道是非辐射和无干扰的。它们分别具有太赫兹频率,Tbit/s数据速率,数百zJ/bit和109 W/mm2的通信和功率传输(PT)效率,具有未来的发展前景。此外,最近引入的用于MI信道的网络拓扑调制(NTM)提供了低复杂性、低延迟和同时无线信息和功率传输(SWIPT)的网络通信。在本文中,通过引入完全高效的用于计算目的的SWIPT,将太赫兹MI通道、NTM设计、纳米级材料(包括石墨烯和单分子磁体)以及3D设计的独特优势结合在以MIComp为代表的新型片上计算架构中。该系统在理论上进行了建模,而使用纳米级线圈和smm获得的系统状态空间在每个周期和每mm3体积的芯片中达到1010至1016位,而目前晶体管计数为109个/ mm2。此外,每个MIComp周期都有能力执行多种目的,包括计算操作,内存状态实现和片上通信。它有望为芯片上计算设计的通信、能源和空间瓶颈提供一种新颖的解决方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
MIComp: 3D on-chip magneto-inductive computing with simultaneous wireless information and power transfer
On-chip computing platforms have bottlenecks including cost and physical limits of scaling transistors, communication bottleneck, energy efficiency and speed costs for memory. Three dimensional (3D) design, carbon nanotube materials, memristor based neuromorphic computing, and optical, RF and magneto-inductive (MI) wireless communication solutions are recently proposed. MI channels are non-radiative and non-interfering by forming coupled networks. They are future promising with capabilities of THz frequency, Tbit/s data rate, hundreds of zJ/bit and 109 W/mm2 communication and power transfer (PT) efficiencies, respectively. In addition, recently introduced network topology modulation (NTM) for MI channels provides network communication with low complexity, low latency and simultaneous wireless information and power transfer (SWIPT). In this article, unique advantages of THz MI channels, NTM design, nanoscale materials including graphene and single molecular magnets (SMMs), and 3D design are combined in a novel on-chip computing architecture denoted by MIComp by introducing fully efficient SWIPT for computing purposes. The system is theoretically modeled while the state space of the system obtained with nanoscale size coils and SMMs achieves 1010 to 1016 bits in each cycle and per mm3 volume of chip compared with the current transistor counts of on the orders of 109 per mm2. Furthermore, each MIComp cycle has ability to perform for multiple purposes consisting of computing operations, memory state implementations and on-chip communications. It promises a novel solution for communication, energy and space bottlenecks for on-chip computing design.
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