ZUMA:一个开放的FPGA覆盖架构

Alexander Brant, G. Lemieux
{"title":"ZUMA:一个开放的FPGA覆盖架构","authors":"Alexander Brant, G. Lemieux","doi":"10.1109/FCCM.2012.25","DOIUrl":null,"url":null,"abstract":"This paper presents the ZUMA open FPGA overlay architecture. It is an open-source, cross-compatible embedded FPGA architecture that is intended to overlay on top of an existing FPGA, in essence an ”FPGA-on-an-FPGA.” This approach has a number of benefits, including bitstream compatibility between different vendors and parts, compatibility with open FPGA tool Hows, and the ability to embed some programmable logic into systems on FPGAs without the need for releasing or recompiling the master netlist. These options can enhance design possibilities and improve designer productivity. Previous attempts to map an FPGA architecture into a commercial FPGA have had an area penalty of 100x at best [4]. Through careful architectural and implementation choices to exploit low-level elements of the host architecture, ZUMA reduces this penalty to as low as 40x. Using the VTR (VPR6) academic tool How, we have been able to compile the entire MCNC benchmark suite to ZUMA. We invite authors of other tool Hows to target ZUMA.","PeriodicalId":226197,"journal":{"name":"2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines","volume":"79 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"113","resultStr":"{\"title\":\"ZUMA: An Open FPGA Overlay Architecture\",\"authors\":\"Alexander Brant, G. Lemieux\",\"doi\":\"10.1109/FCCM.2012.25\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the ZUMA open FPGA overlay architecture. It is an open-source, cross-compatible embedded FPGA architecture that is intended to overlay on top of an existing FPGA, in essence an ”FPGA-on-an-FPGA.” This approach has a number of benefits, including bitstream compatibility between different vendors and parts, compatibility with open FPGA tool Hows, and the ability to embed some programmable logic into systems on FPGAs without the need for releasing or recompiling the master netlist. These options can enhance design possibilities and improve designer productivity. Previous attempts to map an FPGA architecture into a commercial FPGA have had an area penalty of 100x at best [4]. Through careful architectural and implementation choices to exploit low-level elements of the host architecture, ZUMA reduces this penalty to as low as 40x. Using the VTR (VPR6) academic tool How, we have been able to compile the entire MCNC benchmark suite to ZUMA. We invite authors of other tool Hows to target ZUMA.\",\"PeriodicalId\":226197,\"journal\":{\"name\":\"2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines\",\"volume\":\"79 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-04-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"113\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/FCCM.2012.25\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FCCM.2012.25","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 113

摘要

提出了ZUMA开放式FPGA覆盖架构。它是一个开源的、交叉兼容的嵌入式FPGA架构,旨在覆盖在现有的FPGA之上,本质上是一个“FPGA on-an-FPGA”。这种方法有很多好处,包括不同供应商和部件之间的比特流兼容性,与开放FPGA工具的兼容性,以及在不需要发布或重新编译主网表的情况下将一些可编程逻辑嵌入FPGA系统的能力。这些选项可以增强设计的可能性并提高设计师的工作效率。以前将FPGA架构映射到商用FPGA的尝试最多有100倍的面积损失[4]。通过仔细的架构和实现选择来利用主机架构的底层元素,ZUMA将这种损失降低到40倍。使用VTR (VPR6)学术工具How,我们已经能够将整个MCNC基准套件编译为ZUMA。我们邀请其他工具的作者将ZUMA作为目标。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
ZUMA: An Open FPGA Overlay Architecture
This paper presents the ZUMA open FPGA overlay architecture. It is an open-source, cross-compatible embedded FPGA architecture that is intended to overlay on top of an existing FPGA, in essence an ”FPGA-on-an-FPGA.” This approach has a number of benefits, including bitstream compatibility between different vendors and parts, compatibility with open FPGA tool Hows, and the ability to embed some programmable logic into systems on FPGAs without the need for releasing or recompiling the master netlist. These options can enhance design possibilities and improve designer productivity. Previous attempts to map an FPGA architecture into a commercial FPGA have had an area penalty of 100x at best [4]. Through careful architectural and implementation choices to exploit low-level elements of the host architecture, ZUMA reduces this penalty to as low as 40x. Using the VTR (VPR6) academic tool How, we have been able to compile the entire MCNC benchmark suite to ZUMA. We invite authors of other tool Hows to target ZUMA.
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