带过冗余商选择的基数2除法的FPGA实现

Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442) Pub Date : 1900-01-01 DOI:10.1109/ICM.2003.237827

A. A. Ibrahem, H. Elsimary, A. Salama

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摘要

现场可编程门阵列(fpga)的灵活性可以为算法密集型应用提供定制硬件的好处，但没有定制硅实现的高成本。本文介绍了基于查找表的fpga实现中对基数2除法算法的改进。该除法算法非常适合IEEE 754标准中属于范围的操作数。采用xilinx技术和FPGA-Advantage CAD工具实现了该系统。

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FPGA implementation of radix 2 division with over-redundant quotient selection

The flexibility of field programmable gate arrays (FPGAs) can provide arithmetic intensive applications with the benefites of custom hardware but without the high cost of custom silicon implementations. In this paper present the adaptation of radix 2 division algorithm for lookup table based FPGAs implementation. This division algorithm is well suited for IEEE 754 standard operands belonging to the range. The implementation has been done with xilinx technology and FPGA-Advantage CAD tools.

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Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442)

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