{"title":"高速乘法器使用嵌套的高阶压缩器","authors":"Neelakanteshwar Reddy Rebala, B. K. Tirumala","doi":"10.1109/ICCCI.2014.6921810","DOIUrl":null,"url":null,"abstract":"Lot of applications today employ multipliers to do many simple and complex jobs, from mathematical calculations to signal processing. But we only employ lower order compressors for this operation. This gives us lot of delay. The proposed paper puts to usage, higher order compressors for the same purpose. This results in reduced delay and improves efficiency greatly.","PeriodicalId":244242,"journal":{"name":"2014 International Conference on Computer Communication and Informatics","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"High speed multipliers using nested higher order compressors\",\"authors\":\"Neelakanteshwar Reddy Rebala, B. K. Tirumala\",\"doi\":\"10.1109/ICCCI.2014.6921810\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Lot of applications today employ multipliers to do many simple and complex jobs, from mathematical calculations to signal processing. But we only employ lower order compressors for this operation. This gives us lot of delay. The proposed paper puts to usage, higher order compressors for the same purpose. This results in reduced delay and improves efficiency greatly.\",\"PeriodicalId\":244242,\"journal\":{\"name\":\"2014 International Conference on Computer Communication and Informatics\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-10-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 International Conference on Computer Communication and Informatics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCCI.2014.6921810\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Conference on Computer Communication and Informatics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCCI.2014.6921810","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High speed multipliers using nested higher order compressors
Lot of applications today employ multipliers to do many simple and complex jobs, from mathematical calculations to signal processing. But we only employ lower order compressors for this operation. This gives us lot of delay. The proposed paper puts to usage, higher order compressors for the same purpose. This results in reduced delay and improves efficiency greatly.