{"title":"碳纳米管表面自组装生长研究","authors":"K. Sivakumar, B. Panchapakesan","doi":"10.1109/ICMENS.2004.137","DOIUrl":null,"url":null,"abstract":"We report the self assembled surface oriented growth of single walled carbon nanotubes along the surface of (100), (110) and (111) silicon wafers using thermal CVD. The nanotubes were grown using iron nanoparticles, 10 nm in diameter, as the catalyst. The growth was carried out at 1000oC in a methane atmosphere. The lattice matching of the silicon and iron crystal lattices led to the formation of self aligned silicides at a high temperature which helped orient the nanotubes. SEM, TEM and AFM characterization revealed single wall carbon nanotubes, about 10 nm in diameter and up to 10 μm in length, growing along the <111> direction of the silicon substrate. This process is easy, reliable and may enable the integration of nanotubes with CMOS processing technology.","PeriodicalId":344661,"journal":{"name":"2004 International Conference on MEMS, NANO and Smart Systems (ICMENS'04)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-08-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Surface Oriented Self Assembled Growth of Carbon Nanotubes\",\"authors\":\"K. Sivakumar, B. Panchapakesan\",\"doi\":\"10.1109/ICMENS.2004.137\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report the self assembled surface oriented growth of single walled carbon nanotubes along the surface of (100), (110) and (111) silicon wafers using thermal CVD. The nanotubes were grown using iron nanoparticles, 10 nm in diameter, as the catalyst. The growth was carried out at 1000oC in a methane atmosphere. The lattice matching of the silicon and iron crystal lattices led to the formation of self aligned silicides at a high temperature which helped orient the nanotubes. SEM, TEM and AFM characterization revealed single wall carbon nanotubes, about 10 nm in diameter and up to 10 μm in length, growing along the <111> direction of the silicon substrate. This process is easy, reliable and may enable the integration of nanotubes with CMOS processing technology.\",\"PeriodicalId\":344661,\"journal\":{\"name\":\"2004 International Conference on MEMS, NANO and Smart Systems (ICMENS'04)\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-08-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 International Conference on MEMS, NANO and Smart Systems (ICMENS'04)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMENS.2004.137\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 International Conference on MEMS, NANO and Smart Systems (ICMENS'04)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMENS.2004.137","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Surface Oriented Self Assembled Growth of Carbon Nanotubes
We report the self assembled surface oriented growth of single walled carbon nanotubes along the surface of (100), (110) and (111) silicon wafers using thermal CVD. The nanotubes were grown using iron nanoparticles, 10 nm in diameter, as the catalyst. The growth was carried out at 1000oC in a methane atmosphere. The lattice matching of the silicon and iron crystal lattices led to the formation of self aligned silicides at a high temperature which helped orient the nanotubes. SEM, TEM and AFM characterization revealed single wall carbon nanotubes, about 10 nm in diameter and up to 10 μm in length, growing along the <111> direction of the silicon substrate. This process is easy, reliable and may enable the integration of nanotubes with CMOS processing technology.