{"title":"利用协处理器数据路径的微处理器系统性能改进","authors":"M. D. Galanis, G. Dimitroulakos, C. Goutis","doi":"10.1109/ICSAMOS.2006.300813","DOIUrl":null,"url":null,"abstract":"The speedups achieved in a generic microprocessor system by employing a high-performance data-path are presented in this work. The data-path acts as a coprocessor that accelerates computational intensive kernel regions thereby increasing the overall performance. It is composed by flexible computational components (FCCs) that can realize any two-level template of primitive operations. The automated coprocessor synthesis method and its integration to a design flow for executing applications on the system is presented. Analytical exploration in respect to the type of the custom data-path and to the microprocessor architecture is performed. The overall application speedups of eight real-life applications, relative to the software execution on the microprocessor, are estimated using the design flow. These speedups range from 1.75 to 3.95, having an average value of 2.72, while the overhead in circuit area is small. A comparison with another high-performance data-path showed that the proposed coprocessor achieves better performance while having smaller area-time products for the generated data-paths","PeriodicalId":204190,"journal":{"name":"2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-07-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Performance Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path\",\"authors\":\"M. D. Galanis, G. Dimitroulakos, C. Goutis\",\"doi\":\"10.1109/ICSAMOS.2006.300813\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The speedups achieved in a generic microprocessor system by employing a high-performance data-path are presented in this work. The data-path acts as a coprocessor that accelerates computational intensive kernel regions thereby increasing the overall performance. It is composed by flexible computational components (FCCs) that can realize any two-level template of primitive operations. The automated coprocessor synthesis method and its integration to a design flow for executing applications on the system is presented. Analytical exploration in respect to the type of the custom data-path and to the microprocessor architecture is performed. The overall application speedups of eight real-life applications, relative to the software execution on the microprocessor, are estimated using the design flow. These speedups range from 1.75 to 3.95, having an average value of 2.72, while the overhead in circuit area is small. A comparison with another high-performance data-path showed that the proposed coprocessor achieves better performance while having smaller area-time products for the generated data-paths\",\"PeriodicalId\":204190,\"journal\":{\"name\":\"2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-07-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICSAMOS.2006.300813\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSAMOS.2006.300813","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Performance Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path
The speedups achieved in a generic microprocessor system by employing a high-performance data-path are presented in this work. The data-path acts as a coprocessor that accelerates computational intensive kernel regions thereby increasing the overall performance. It is composed by flexible computational components (FCCs) that can realize any two-level template of primitive operations. The automated coprocessor synthesis method and its integration to a design flow for executing applications on the system is presented. Analytical exploration in respect to the type of the custom data-path and to the microprocessor architecture is performed. The overall application speedups of eight real-life applications, relative to the software execution on the microprocessor, are estimated using the design flow. These speedups range from 1.75 to 3.95, having an average value of 2.72, while the overhead in circuit area is small. A comparison with another high-performance data-path showed that the proposed coprocessor achieves better performance while having smaller area-time products for the generated data-paths