高压线路暂态研究:实验与仿真结果

2006 IEEE Power India Conference Pub Date : 2006-06-05 DOI:10.1109/POWERI.2006.1632500

S. Chatterjee, S. Chakravorti, C. K. Roy, S. Biswas

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引用次数: 4

摘要

本文对高压线路中不同电路拓扑结构引起的暂态进行了研究。分析数据来源于实验数据，并在matlab环境下基于Simulink进行仿真。讨论了实验设置、仿真参数以及仿真模型的可行性。用连续小波变换对数据进行分析，得出结论

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Studies on transients in high voltage line: experimental and simulation results

This paper presents the study of transients resulting from different circuit topology in high voltage line. The analysed data are obtained from experiments as well as simulated model based on Simulink in matlab environment. The experimental set up as well as the simulation parameters are discussed along with the viability of the simulation model. The data are analysed using continuous wavelet transform and conclusions have been drawn thereafter

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2006 IEEE Power India Conference

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