在神经网络中使用感知器的数字构建块

Shilpa Mehta
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引用次数: 0

摘要

大多数微处理器和微控制器都是基于数字电子构建模块。数字电子学为我们提供了许多用于各种算术和逻辑运算的组合和顺序电路。这些包括加法器,减法器,编码器,解码器,多路复用器,DE多路复用器和触发器。它们进一步组合成更高的配置来执行高级操作。这些操作是使用数字电子学中的逻辑电路完成的。但在本文中,我们探索了使用人工神经网络的人类推理方法。我们将研究用SLP(单层感知器)和MLP(多层感知器)实现的逻辑门的神经实现。我们还将研究循环神经架构来制作基本的记忆元素,即使用反馈并可能涉及一个或多个神经元层的触发器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Digital Building Blocks using Perceptrons in Neural Networks
Most microprocessors and microcontrollers are based on Digital Electronics building Blocks. Digital Electronics gives us a number of combinational and sequential circuits for various arithmetic and logical operations. These include Adders, Subtracters, Encoders, Decoders, Multiplexers, DE multiplexers and Flip Flops. These further combine into higher configurations to perform advanced operations. These operations are done using logic circuits in digital electronics. But in this paper, we explore the human reasoning approach using artificial neural networks. We will look into neural implementations of logic gates implemented with SLP (Single layer perceptron) and MLP (Multi-Layer Perceptron). We will also look into recurrent neural architectures to make basic memory elements, viz. Flip Flops which use feedback and may involve in one or more neuron layers.
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