Da-Hee Kim, Jae-Ean Lee, Gyujin Choi, Sunguk Lee, Giho Jeong, Hongwon Kim, S. Lee, Dong Wook Kim
{"title":"扇出面板级封装(FoPLP)可靠通孔结构研究","authors":"Da-Hee Kim, Jae-Ean Lee, Gyujin Choi, Sunguk Lee, Giho Jeong, Hongwon Kim, S. Lee, Dong Wook Kim","doi":"10.1109/ectc51906.2022.00134","DOIUrl":null,"url":null,"abstract":"The fan out technology has been recently introduced as an effective method to reduce a packaging cost and to minimize a package size by using a redistribution layer(RDL). Moreover, as the number of high-capacity ultra-small devices increases, transition to fan-out package technology (FOPKG) is an important for realizing fast signal speed and high capacity. To this end, one of the key parameters for FOPKG’s interconnection density and fine pitch is adopting the stacked fine via technology.In this paper, we propose the physical crack mode of the stacked via in the fan-out panel level package(FOPLP), and try to optimize structural integrity based on the crack generation mechanism. Physical crack in stacked vias occurs in two different modes: via-via interface crack, via-dielectric point crack. To investigate via-via interface crack, various via shapes were tested. As a result, vias with lower dimple showed better structural stability under temperature changing condition. For via-dielectric point crack, structural DOE for tapered via angle was performed, and an optimal angle with released stress between cu and dielectric could be found. Furthermore, it was found that physical crack occurs depending on via size. Thus, in order to secure reliability margin, a study was conducted to change in shape and reinforce the weak point.In summary, as a result of the above study, it could be possible to optimize the via structure. The package reliability tests (Pre-condition + TC / u-HAST, HTS) were successfully evaluated with a vehicle that is adopted by optimal triple stacked via structure. By using the stacked via optimized through this study, the characteristics of FOPKG can be further improved by high electrical performance and the reduction of package size.","PeriodicalId":139520,"journal":{"name":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Study of reliable via structure for Fan Out Panel Level Package (FoPLP)\",\"authors\":\"Da-Hee Kim, Jae-Ean Lee, Gyujin Choi, Sunguk Lee, Giho Jeong, Hongwon Kim, S. Lee, Dong Wook Kim\",\"doi\":\"10.1109/ectc51906.2022.00134\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The fan out technology has been recently introduced as an effective method to reduce a packaging cost and to minimize a package size by using a redistribution layer(RDL). Moreover, as the number of high-capacity ultra-small devices increases, transition to fan-out package technology (FOPKG) is an important for realizing fast signal speed and high capacity. To this end, one of the key parameters for FOPKG’s interconnection density and fine pitch is adopting the stacked fine via technology.In this paper, we propose the physical crack mode of the stacked via in the fan-out panel level package(FOPLP), and try to optimize structural integrity based on the crack generation mechanism. Physical crack in stacked vias occurs in two different modes: via-via interface crack, via-dielectric point crack. To investigate via-via interface crack, various via shapes were tested. As a result, vias with lower dimple showed better structural stability under temperature changing condition. For via-dielectric point crack, structural DOE for tapered via angle was performed, and an optimal angle with released stress between cu and dielectric could be found. Furthermore, it was found that physical crack occurs depending on via size. Thus, in order to secure reliability margin, a study was conducted to change in shape and reinforce the weak point.In summary, as a result of the above study, it could be possible to optimize the via structure. The package reliability tests (Pre-condition + TC / u-HAST, HTS) were successfully evaluated with a vehicle that is adopted by optimal triple stacked via structure. By using the stacked via optimized through this study, the characteristics of FOPKG can be further improved by high electrical performance and the reduction of package size.\",\"PeriodicalId\":139520,\"journal\":{\"name\":\"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ectc51906.2022.00134\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ectc51906.2022.00134","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Study of reliable via structure for Fan Out Panel Level Package (FoPLP)
The fan out technology has been recently introduced as an effective method to reduce a packaging cost and to minimize a package size by using a redistribution layer(RDL). Moreover, as the number of high-capacity ultra-small devices increases, transition to fan-out package technology (FOPKG) is an important for realizing fast signal speed and high capacity. To this end, one of the key parameters for FOPKG’s interconnection density and fine pitch is adopting the stacked fine via technology.In this paper, we propose the physical crack mode of the stacked via in the fan-out panel level package(FOPLP), and try to optimize structural integrity based on the crack generation mechanism. Physical crack in stacked vias occurs in two different modes: via-via interface crack, via-dielectric point crack. To investigate via-via interface crack, various via shapes were tested. As a result, vias with lower dimple showed better structural stability under temperature changing condition. For via-dielectric point crack, structural DOE for tapered via angle was performed, and an optimal angle with released stress between cu and dielectric could be found. Furthermore, it was found that physical crack occurs depending on via size. Thus, in order to secure reliability margin, a study was conducted to change in shape and reinforce the weak point.In summary, as a result of the above study, it could be possible to optimize the via structure. The package reliability tests (Pre-condition + TC / u-HAST, HTS) were successfully evaluated with a vehicle that is adopted by optimal triple stacked via structure. By using the stacked via optimized through this study, the characteristics of FOPKG can be further improved by high electrical performance and the reduction of package size.