针对低成本和高性能应用的高可扩展和易于堆叠的相变存储单元阵列的考虑

D. Kang, Song Yi Kim, Sang-su Park, S. Eun, Jong Whan Ma, Jae Hyun Park, Il Mok Park, K. Park, Jae-Hee Oh, Zhe Wu, Jeong hee Park, Sug-Woo Jung, Ho Kyun Ahn, Youngsoo Lim, Sunghee Cho, G. Jeong, D. Ahn, S. Nam, G. Jin, E. Jung
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引用次数: 7

摘要

大数据和云计算时代对存储器子系统性能提升的需求,开始为相变存储器、自旋转矩传递磁存储器、金属氧化物存储器等新兴存储器开辟新的市场。为了满足这些需求,在19nm技术节点上引入了一种经济高效的高速相变存储单元方案,该方案可直接扩展到1y或1z nm节点,并可扩展到堆叠阵列以获得更高的密度。本文采用了自对准单元图像化和金属字线上垂直多晶硅二极管开关等关键技术。此外,优化了damascene Ge-Sb-Te技术,以提高编程速度并表现出优异的电池性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Considerations on highly scalable and easily stackable phase change memory cell array for low-cost and high-performance applications
Needs for the performance improvement of memory subsystem in big data and clouding computing era begin to open new markets for emerging memories such as phase change memory, spin-torque-transfer magnetic memory, and metal oxide memory. To fulfill these needs, a cost-effective and high-speed phase change memory cell scheme was introduced at 19nm technology node, which is directly scalable down to 1y or 1z nm nodes and can be extendable to stacked array for higher density. Here, key technologies such as self-aligned cell patterning and vertical poly-Si diode switch on metal word line were adopted. In addition, damascene Ge-Sb-Te technologies were optimized to improve programming speed and to show excellent cell performances.
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