{"title":"在将嵌套循环算法映射到低维处理器阵列时避免数据链和计算冲突","authors":"Jingling Xue, P. Lenders","doi":"10.1109/ICPADS.1994.590382","DOIUrl":null,"url":null,"abstract":"This paper describes a unified approach to checking data link and computational conflicts in mapping algorithms to lower-dimensional processor arrays. Based primarily on the notion of Hermite normal form, we propose a range of necessary and sufficient conditions to identify mappings without data link and computational conflicts. These conditions are then used to find optimal time mappings of a transitive closure algorithm to linear processor arrays.","PeriodicalId":154429,"journal":{"name":"Proceedings of 1994 International Conference on Parallel and Distributed Systems","volume":"91 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Avoiding data link and computational conflicts in mapping nested loop algorithms to lower-dimensional processor arrays\",\"authors\":\"Jingling Xue, P. Lenders\",\"doi\":\"10.1109/ICPADS.1994.590382\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a unified approach to checking data link and computational conflicts in mapping algorithms to lower-dimensional processor arrays. Based primarily on the notion of Hermite normal form, we propose a range of necessary and sufficient conditions to identify mappings without data link and computational conflicts. These conditions are then used to find optimal time mappings of a transitive closure algorithm to linear processor arrays.\",\"PeriodicalId\":154429,\"journal\":{\"name\":\"Proceedings of 1994 International Conference on Parallel and Distributed Systems\",\"volume\":\"91 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-12-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1994 International Conference on Parallel and Distributed Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICPADS.1994.590382\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1994 International Conference on Parallel and Distributed Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICPADS.1994.590382","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Avoiding data link and computational conflicts in mapping nested loop algorithms to lower-dimensional processor arrays
This paper describes a unified approach to checking data link and computational conflicts in mapping algorithms to lower-dimensional processor arrays. Based primarily on the notion of Hermite normal form, we propose a range of necessary and sufficient conditions to identify mappings without data link and computational conflicts. These conditions are then used to find optimal time mappings of a transitive closure algorithm to linear processor arrays.