W. Wang, A. Gibby, Z. Wang, Tze Wee Chen, S. Fujita, P. Griffin, Y. Nishi, S. Wong
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A nonvolatile SRAM cell with two back-up nonvolatile memory devices is proposed. This novel cell offers nonvolatile storage, thus allowing selected blocks of SRAM to be powered down during operation. There is no area penalty. A slight performance penalty is anticipated