雷达脉冲对脉冲识别的并行FFT和功率包络算法

2020 11th IEEE Annual Ubiquitous Computing, Electronics & Mobile Communication Conference (UEMCON) Pub Date : 2020-10-28 DOI:10.1109/UEMCON51285.2020.9298132

Jordan Juliano, Jaron Lin, Alex Erdogan, K. George

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引用次数: 2

摘要

脉冲雷达信号的识别是雷达接收机处理中的一个关键环节。在没有事先了解信号的情况下，在密集和嘈杂的环境中提取宽带接收机中的射频雷达脉冲信息，在高风险的实时场景中具有挑战性。重叠的雷达脉冲会在信号之间产生干扰，导致信息丢失或隐藏，从而使识别变得复杂。通过将基于功率包络线的去交错算法的脉冲描述词(PDW)与基于并行快速傅立叶变换(FFT)的去交错算法相关联，提出了一种基于MPSoC FPGA的去交错重叠雷达脉冲序列的去交错处理方法。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Radar Pulse on Pulse Identification Parallel FFT and Power Envelope Algorithm

Identification of pulse radar signals is a crucial component in radar receiver processing. Extracting RF radar pulse information in wideband receivers in a dense and noisy environment without prior knowledge of the signal is challenging in high-risk real-time scenarios. Overlapping radar pulses can create complications in identification by creating interference between the signals, causing loss or hidden information. This paper presents a deinterleaving overlapping radar pulse train process by correlating the pulse descriptor words (PDW) of a power envelope based deinterleaving algorithm with a parallel fast Fourier transform (FFT) based deinterleaving algorithm implemented on an MPSoC FPGA.

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2020 11th IEEE Annual Ubiquitous Computing, Electronics & Mobile Communication Conference (UEMCON)

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