1.8V 204.8- $\mu \mathrm{W}$ 12位四阶有源无源$\Sigma\Delta$生物医学应用调制器

2019 Devices for Integrated Circuit (DevIC) Pub Date : 2019-03-01 DOI:10.1109/DEVIC.2019.8783626

Arifuddin Sohel, Aayesha al Khadir, Maliha Naaz, Amena Najeeb

{"title":"1.8V 204.8- $\\mu \\mathrm{W}$ 12位四阶有源无源$\\Sigma\\Delta$生物医学应用调制器","authors":"Arifuddin Sohel, Aayesha al Khadir, Maliha Naaz, Amena Najeeb","doi":"10.1109/DEVIC.2019.8783626","DOIUrl":null,"url":null,"abstract":"This paper presents a 1.8V fourth-order 12.64 bits active-passive delta-sigma modulator. Passive integrators reduce power consumption which employs a switched capacitor circuit that operates from 1V to 1.8V supply voltage. The modulator is implemented in a $\\mathbf{0.18}\\mu \\mathbf{m}$ CMOS process and achieves 77.85 dB SNR within 500 Hz at a sampling frequency of 256 kHz and consumes $\\mathbf{204.8}\\mu \\mathbf{W}$ from a 1.8V supply. The Sigma-Delta modulator becomes the appropriate choice for high resolution as well as low frequency applications due to its highly linear property derived from a linear single-bit quantizer and oversampling technique.","PeriodicalId":294095,"journal":{"name":"2019 Devices for Integrated Circuit (DevIC)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A 1.8V 204.8-$\\\\mu \\\\mathrm{W}$ 12-Bit Fourth Order Active Passive $\\\\Sigma\\\\Delta$ Modulator for Biomedical Applications\",\"authors\":\"Arifuddin Sohel, Aayesha al Khadir, Maliha Naaz, Amena Najeeb\",\"doi\":\"10.1109/DEVIC.2019.8783626\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a 1.8V fourth-order 12.64 bits active-passive delta-sigma modulator. Passive integrators reduce power consumption which employs a switched capacitor circuit that operates from 1V to 1.8V supply voltage. The modulator is implemented in a $\\\\mathbf{0.18}\\\\mu \\\\mathbf{m}$ CMOS process and achieves 77.85 dB SNR within 500 Hz at a sampling frequency of 256 kHz and consumes $\\\\mathbf{204.8}\\\\mu \\\\mathbf{W}$ from a 1.8V supply. The Sigma-Delta modulator becomes the appropriate choice for high resolution as well as low frequency applications due to its highly linear property derived from a linear single-bit quantizer and oversampling technique.\",\"PeriodicalId\":294095,\"journal\":{\"name\":\"2019 Devices for Integrated Circuit (DevIC)\",\"volume\":\"70 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 Devices for Integrated Circuit (DevIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DEVIC.2019.8783626\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Devices for Integrated Circuit (DevIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DEVIC.2019.8783626","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

摘要

本文设计了一种1.8V四阶12.64位有源无源δ - σ调制器。无源集成商采用开关电容电路，工作电压从1V到1.8V，从而降低了功耗。该调制器采用$\mathbf{0.18}\mu \mathbf{m}$ CMOS工艺实现，采样频率为256 kHz，在500 Hz范围内实现77.85 dB信噪比，从1.8V电源消耗$\mathbf{204.8}\mu \mathbf{W}$。由于线性单比特量化器和过采样技术带来的高度线性特性，Sigma-Delta调制器成为高分辨率和低频应用的合适选择。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 1.8V 204.8-$\mu \mathrm{W}$ 12-Bit Fourth Order Active Passive $\Sigma\Delta$ Modulator for Biomedical Applications

This paper presents a 1.8V fourth-order 12.64 bits active-passive delta-sigma modulator. Passive integrators reduce power consumption which employs a switched capacitor circuit that operates from 1V to 1.8V supply voltage. The modulator is implemented in a $\mathbf{0.18}\mu \mathbf{m}$ CMOS process and achieves 77.85 dB SNR within 500 Hz at a sampling frequency of 256 kHz and consumes $\mathbf{204.8}\mu \mathbf{W}$ from a 1.8V supply. The Sigma-Delta modulator becomes the appropriate choice for high resolution as well as low frequency applications due to its highly linear property derived from a linear single-bit quantizer and oversampling technique.

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2019 Devices for Integrated Circuit (DevIC)

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