嵌入式存储器应用的6T SRAM综述

P. S. Yadav, Harsha Jain
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引用次数: 0

摘要

由于嵌入式静态随机存取存储器(SRAM)对整个系统及其相对有限的设计具有重大影响,因此有必要从战略上管理嵌入式SRAM的权衡。sram通常需要在功率、性能和密度方面进行权衡。在所有应用中,这三个维度在某种程度上都是必要的;因此,在开发嵌入式SRAM时,嵌入式SRAM设计必须包含最关键的系统特定要求。本文讨论了SRAM的许多因素,包括静态噪声余量(SNM)、读访问时间(RAT)、写访问时间(WAT)、读稳定性和写能力、电源、数据保留电压(DRV)和进程控制。在为嵌入式存储器应用设计SRAM时,所有这些因素都是至关重要的。本文还讨论了参数比较和文献综述。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Review of 6T SRAM for Embedded Memory Applications
Due to the substantial impact embedded Static Random Access Memory (SRAM)s have on the overall system and their relatively limited design, it is essential to manage embedded SRAM trade-offs strategically. SRAMs have power, performance and density trade-offs in general. In all applications, all three dimensions are necessary to some extent; accordingly, embedded SRAM design must incorporate the most crucial system-specific requirements when developing embedded SRAM. This paper discusses many SRAM factors, including Static Noise Margin (SNM), Read Access Time (RAT),Write Access Time (WAT), Read Stability and Write Ability, Power, Data Retention Voltage (DRV), and Process Control. All these factors are crucial when designing SRAM for embedded memory applications. There has also been a discussion of the parameter comparisons and the literature review of the current papers.
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