{"title":"一个高效编译仿真系统的VLIW代码验证","authors":"Jae-Woo Ahn, Soo-Mook Moon, Wonyong Sung","doi":"10.1109/SIMSYM.1998.668452","DOIUrl":null,"url":null,"abstract":"We present an efficient compiled simulation system for the verification of a VLIW instruction set architecture and its assembly code. Our existing compiled simulation system is made to be faster by adopting incremental recompilation and C-assembly cosimulation techniques to improve the conventional compiled simulation. As a part of SPARC-based VLIW testbed, the efficiency and validity of our compiled simulation system are verified with three SPEC '89 integer benchmarks and several UNIX utilities.","PeriodicalId":339060,"journal":{"name":"Proceedings 31st Annual Simulation Symposium","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-04-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"An efficient compiled simulation system for VLIW code verification\",\"authors\":\"Jae-Woo Ahn, Soo-Mook Moon, Wonyong Sung\",\"doi\":\"10.1109/SIMSYM.1998.668452\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present an efficient compiled simulation system for the verification of a VLIW instruction set architecture and its assembly code. Our existing compiled simulation system is made to be faster by adopting incremental recompilation and C-assembly cosimulation techniques to improve the conventional compiled simulation. As a part of SPARC-based VLIW testbed, the efficiency and validity of our compiled simulation system are verified with three SPEC '89 integer benchmarks and several UNIX utilities.\",\"PeriodicalId\":339060,\"journal\":{\"name\":\"Proceedings 31st Annual Simulation Symposium\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-04-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 31st Annual Simulation Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIMSYM.1998.668452\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 31st Annual Simulation Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIMSYM.1998.668452","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An efficient compiled simulation system for VLIW code verification
We present an efficient compiled simulation system for the verification of a VLIW instruction set architecture and its assembly code. Our existing compiled simulation system is made to be faster by adopting incremental recompilation and C-assembly cosimulation techniques to improve the conventional compiled simulation. As a part of SPARC-based VLIW testbed, the efficiency and validity of our compiled simulation system are verified with three SPEC '89 integer benchmarks and several UNIX utilities.
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