A wideband delta-sigma based closed-loop fully digital phase modulator in 45nm CMOS SOI

This paper presents a new architecture for an RF phase modulator that significantly improves the phase resolution. The modulator utilizes 32 variable delay elements in a delay lock loop (DLL) configuration to provide wideband 1-3GHz operation with coarse 5-bit resolution. A 5-bit multiplexer selects different taps of the DLL according to the baseband digital phase data to generate desired phase modulated signal at the output. A high speed 5-bit digital delta-sigma modulator is additionally used to compensate for the phase truncation occurring in the 5-bit DLL. The phase modulator IC is implemented in 45nm CMOS SOI and achieves <;2% rms EVM while achieving 55dB rejection of close-to-carrier emissions for an 8Mb/s GMSK signal at 2.3GHz, with power consumption below 35mW.