{"title":"对板上和片上互连的电阻和电感进行了全三维BIE评估","authors":"Martijn Huynen, D. De Zutter, D. Ginste","doi":"10.1109/SAPIW.2018.8401653","DOIUrl":null,"url":null,"abstract":"In this contribution, the resistance and inductance of 3-D interconnects are obtained through a full-wave approach. By solving a free space boundary integral equation (BIE) combined with a fully 3-D differential surface admittance operator in a circuit framework, an effective procedure to study finite conductivity interconnects is presented. The accuracy of the proposed method in characterizing 3-D interconnects is demonstrated through an on-board and an on-chip example.","PeriodicalId":423850,"journal":{"name":"2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A fully 3-D BIE evaluation of the resistance and inductance of on-board and on-chip interconnects\",\"authors\":\"Martijn Huynen, D. De Zutter, D. Ginste\",\"doi\":\"10.1109/SAPIW.2018.8401653\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this contribution, the resistance and inductance of 3-D interconnects are obtained through a full-wave approach. By solving a free space boundary integral equation (BIE) combined with a fully 3-D differential surface admittance operator in a circuit framework, an effective procedure to study finite conductivity interconnects is presented. The accuracy of the proposed method in characterizing 3-D interconnects is demonstrated through an on-board and an on-chip example.\",\"PeriodicalId\":423850,\"journal\":{\"name\":\"2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI)\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SAPIW.2018.8401653\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SAPIW.2018.8401653","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A fully 3-D BIE evaluation of the resistance and inductance of on-board and on-chip interconnects
In this contribution, the resistance and inductance of 3-D interconnects are obtained through a full-wave approach. By solving a free space boundary integral equation (BIE) combined with a fully 3-D differential surface admittance operator in a circuit framework, an effective procedure to study finite conductivity interconnects is presented. The accuracy of the proposed method in characterizing 3-D interconnects is demonstrated through an on-board and an on-chip example.