基于NV-RAM的可靠高速紧凑型cam匹配电路

Quang-Manh Duong, Quang-Kien Trinh, Hai D. Nguyen, Van‐Phuc Hoang, H. Vu, Dinh‐Ha Dao, D. Luong, Van-Toan Tran
{"title":"基于NV-RAM的可靠高速紧凑型cam匹配电路","authors":"Quang-Manh Duong, Quang-Kien Trinh, Hai D. Nguyen, Van‐Phuc Hoang, H. Vu, Dinh‐Ha Dao, D. Luong, Van-Toan Tran","doi":"10.32913/mic-ict-research.v2022.n2.1060","DOIUrl":null,"url":null,"abstract":"This paper presents an effective approach forimplementing content address memory (CAM) based on Nonvolatile random-access memory (NV-RAM) technologies. Weused the 2T-2R bitcell structure implemented on a 65nmCMOS process with a special in-memory matching circuitfor realizing low-delay and energy-efficient lookup operations.The simulation results on Synopsys HSPICE indicate that theproposed CAM design can achieve a search error rate of0.03-4.61%, search energy per bit of 4.36-6.47 fJ, and anextremely small search latency varying from 0.11-0.12 nsdepending on the specific design configurations.","PeriodicalId":432355,"journal":{"name":"Research and Development on Information and Communication Technology","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Reliable High-speed Compact In-memory Matching Circuit for CAM-Application Based on NV-RAM\",\"authors\":\"Quang-Manh Duong, Quang-Kien Trinh, Hai D. Nguyen, Van‐Phuc Hoang, H. Vu, Dinh‐Ha Dao, D. Luong, Van-Toan Tran\",\"doi\":\"10.32913/mic-ict-research.v2022.n2.1060\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an effective approach forimplementing content address memory (CAM) based on Nonvolatile random-access memory (NV-RAM) technologies. Weused the 2T-2R bitcell structure implemented on a 65nmCMOS process with a special in-memory matching circuitfor realizing low-delay and energy-efficient lookup operations.The simulation results on Synopsys HSPICE indicate that theproposed CAM design can achieve a search error rate of0.03-4.61%, search energy per bit of 4.36-6.47 fJ, and anextremely small search latency varying from 0.11-0.12 nsdepending on the specific design configurations.\",\"PeriodicalId\":432355,\"journal\":{\"name\":\"Research and Development on Information and Communication Technology\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-09-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Research and Development on Information and Communication Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.32913/mic-ict-research.v2022.n2.1060\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Research and Development on Information and Communication Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.32913/mic-ict-research.v2022.n2.1060","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

本文提出了一种基于非易失性随机存取存储器(NV-RAM)技术实现内容地址存储器(CAM)的有效方法。我们使用了在65nmCMOS工艺上实现的2T-2R位元结构和特殊的内存匹配电路来实现低延迟和节能的查找操作。在Synopsys HSPICE上的仿真结果表明,根据具体的设计配置,所提出的凸轮设计可以实现0.03 ~ 4.61%的搜索错误率,每比特搜索能量为4.36 ~ 6.47 fJ,以及极小的搜索延迟(0.11 ~ 0.12 nsns)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Reliable High-speed Compact In-memory Matching Circuit for CAM-Application Based on NV-RAM
This paper presents an effective approach forimplementing content address memory (CAM) based on Nonvolatile random-access memory (NV-RAM) technologies. Weused the 2T-2R bitcell structure implemented on a 65nmCMOS process with a special in-memory matching circuitfor realizing low-delay and energy-efficient lookup operations.The simulation results on Synopsys HSPICE indicate that theproposed CAM design can achieve a search error rate of0.03-4.61%, search energy per bit of 4.36-6.47 fJ, and anextremely small search latency varying from 0.11-0.12 nsdepending on the specific design configurations.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信