T. Seki, S. Akui, K. Seno, M. Nakai, T. Meguro, Tetsuo Kondo, A. Hashiguchi, Hirokazu Kawahara, K. Kumano, M. Shimura
{"title":"一种低功耗嵌入式微处理器的动态电压和频率管理","authors":"T. Seki, S. Akui, K. Seno, M. Nakai, T. Meguro, Tetsuo Kondo, A. Hashiguchi, Hirokazu Kawahara, K. Kumano, M. Shimura","doi":"10.1093/ietele/e88-c.4.520","DOIUrl":null,"url":null,"abstract":"A dynamic voltage and frequency management scheme that autonomously controls the clock frequency (8 to 123 MHz at 0.5 MHz step) and adaptively controls the voltage (0.9 to 1.6 V at 5 mV step) with a leakage power compensation effect is developed for a low-power embedded microprocessor. It achieves 82% power reduction in personal information manager (PIM) application.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"140 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"205","resultStr":"{\"title\":\"Dynamic voltage and frequency management for a low-power embedded microprocessor\",\"authors\":\"T. Seki, S. Akui, K. Seno, M. Nakai, T. Meguro, Tetsuo Kondo, A. Hashiguchi, Hirokazu Kawahara, K. Kumano, M. Shimura\",\"doi\":\"10.1093/ietele/e88-c.4.520\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A dynamic voltage and frequency management scheme that autonomously controls the clock frequency (8 to 123 MHz at 0.5 MHz step) and adaptively controls the voltage (0.9 to 1.6 V at 5 mV step) with a leakage power compensation effect is developed for a low-power embedded microprocessor. It achieves 82% power reduction in personal information manager (PIM) application.\",\"PeriodicalId\":273317,\"journal\":{\"name\":\"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)\",\"volume\":\"140 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"205\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1093/ietele/e88-c.4.520\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1093/ietele/e88-c.4.520","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Dynamic voltage and frequency management for a low-power embedded microprocessor
A dynamic voltage and frequency management scheme that autonomously controls the clock frequency (8 to 123 MHz at 0.5 MHz step) and adaptively controls the voltage (0.9 to 1.6 V at 5 mV step) with a leakage power compensation effect is developed for a low-power embedded microprocessor. It achieves 82% power reduction in personal information manager (PIM) application.