{"title":"用于无线传感器的低功耗CMOS 2.4 ghz单片整数n合成器","authors":"Yan Dan Lei","doi":"10.1109/RFIT.2005.1598915","DOIUrl":null,"url":null,"abstract":"A low-power 2.4-GHz monolithic frequency synthesizer, realized in a standard 0.18-/spl mu/M CMOS technology is reported. It consumes 8 mW from a single 1.8 V power supply, and is fully functional from 2.1-GHz to 2.4-GHz. The phase noise of the output signal is -98.7 dBc/Hz at 500 KHz offset. The die size is 0.8/spl times/0.8 mm/sup 2/.","PeriodicalId":337918,"journal":{"name":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","volume":"272 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"A low power CMOS 2.4-GHz monolithic integer-N synthesizer for wireless sensor\",\"authors\":\"Yan Dan Lei\",\"doi\":\"10.1109/RFIT.2005.1598915\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low-power 2.4-GHz monolithic frequency synthesizer, realized in a standard 0.18-/spl mu/M CMOS technology is reported. It consumes 8 mW from a single 1.8 V power supply, and is fully functional from 2.1-GHz to 2.4-GHz. The phase noise of the output signal is -98.7 dBc/Hz at 500 KHz offset. The die size is 0.8/spl times/0.8 mm/sup 2/.\",\"PeriodicalId\":337918,\"journal\":{\"name\":\"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks\",\"volume\":\"272 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIT.2005.1598915\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIT.2005.1598915","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low power CMOS 2.4-GHz monolithic integer-N synthesizer for wireless sensor
A low-power 2.4-GHz monolithic frequency synthesizer, realized in a standard 0.18-/spl mu/M CMOS technology is reported. It consumes 8 mW from a single 1.8 V power supply, and is fully functional from 2.1-GHz to 2.4-GHz. The phase noise of the output signal is -98.7 dBc/Hz at 500 KHz offset. The die size is 0.8/spl times/0.8 mm/sup 2/.