SimSoC:用于全系统仿真的SystemC TLM集成ISS

C. Helmstetter, V. Joloboff
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引用次数: 34

摘要

嵌入式系统的发展要求开发越来越复杂的软硬件平台。全系统仿真使得在完全仿真的硬件平台上运行包括操作系统在内的精确二进制嵌入式软件成为可能。鉴于大多数仿真环境不支持完整的系统仿真,或者不使用任何硬件建模技术,或者结合了不同类型的技术,SimSoC正在开发一个完整的系统仿真体系结构,其集成方法仅依赖于SystemC硬件建模和事务级建模抽象(TLM)进行通信。为了以相当高的速度模拟处理器,SimSoC将指令集模拟器(ISS)集成为SystemC模块,并与其他平台组件具有TLM接口。ISSpsilas使用动态转换的一种变体方法来运行二进制代码。动态翻译器使用预先编译的代码,这些代码由指令执行的专用函数组成,使用部分求值技术。它是由一个可配置的代码生成器生成的,这使得调整生成的代码以优化目标软件应用程序的模拟速度成为可能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
SimSoC: A SystemC TLM integrated ISS for full system simulation
The development of embedded systems requires the development of increasingly complex software and hardware platforms. Full system simulation makes it possible to run the exact binary embedded software including the operating system on a totally simulated hardware platform. Whereas most simulation environments do not support full system simulation, or do not use any hardware modeling techniques, or have combined different types of technology, SimSoC is developing a full system simulation architecture with an integrated approach relying only upon SystemC hardware modeling and transaction-level modeling abstractions (TLM) for communications. To simulate processors at reasonably high speed, SimSoC integrates instruction set simulators (ISS) as SystemC modules with TLM interfaces to the other platform components. The ISSpsilas use a variant approach of dynamic translation to run binary code. The dynamic translator uses pre-compiled code that consists of specialized functions for instruction execution, using partial evaluation techniques. It is generated by a configurable code generator, which makes it possible to tune the generated code to optimize simulation speed for the target software application.
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