Twill:用于并行处理单线程C程序的混合微控制器- fpga框架

Doug Gallatin, Aaron W. Keen, C. Lupo, J. Oliver
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引用次数: 3

摘要

集成微处理器和可重新编程逻辑的片上系统平台正越来越多地应用于从汽车工业到网络基础设施等多个领域。不幸的是,伴随这些产品的开发工具还有很多需要改进的地方,需要了解像C这样的传统嵌入式系统语言和像Verilog这样的硬件描述语言。我们建议用Twill来弥补这个差距,Twill是一个真正的自动混合编译器,可以利用这些平台固有的并行性。Twill可以从单线程C代码中提取长时间运行的线程,并将这些线程分布在硬件和软件领域,以更充分地利用处理器和嵌入式可重构逻辑结构之间的不对称特性。我们表明,Twill在CHStone基准测试中提供了显着的性能提升,比纯硬件方法平均提高了1.63倍,比纯软件方法平均提高了22.2倍,同时与纯硬件方法相比,通常减少了可重构逻辑所需的面积。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Twill: A Hybrid Microcontroller-FPGA Framework for Parallelizing Single-Threaded C Programs
Increasingly System-On-A-Chip platforms which incorporate both microprocessors and re-programmable logic are being utilized across several fields ranging from the automotive industry to network infrastructure. Unfortunately, the development tools accompanying these products leave much to be desired, requiring knowledge of both traditional embedded systems languages like C and hardware description languages like Verilog. We propose to bridge this gap with Twill, a truly automatic hybrid compiler that can take advantage of the parallelism inherent in these platforms. Twill can extract long-running threads from single threaded C code and distribute these threads across the hardware and software domains to more fully utilize the asymmetric characteristics between processors and the embedded reconfigurable logic fabric. We show that Twill provides a significant performance increase on the CHStone benchmarks with an average 1.63 times increase over the pure hardware approach and an increase of 22.2 times on average over the pure software approach while in general decreasing the area required by the reconfigurable logic compared to the pure hardware approach.
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