用于通信系统的模块化/超立方体网格解码器的快速原型设计

CCECE '97. Canadian Conference on Electrical and Computer Engineering. Engineering Innovation: Voyage of Discovery. Conference Proceedings Pub Date : 1997-05-25 DOI:10.1109/CCECE.1997.614795

L. Pouliot, P. Fortier

{"title":"用于通信系统的模块化/超立方体网格解码器的快速原型设计","authors":"L. Pouliot, P. Fortier","doi":"10.1109/CCECE.1997.614795","DOIUrl":null,"url":null,"abstract":"In this work, we look at a novel approach for the realization of a fully parallel decoder based on the Viterbi algorithm and hypercube architecture using a rapid prototyping method on FPGAs. Our proposed modular/hypercube architecture allows optimization of the surface by connecting modules together in such a way that a minimum of interconnections between modules is needed. Further optimization is possible using temporal multiplexing.","PeriodicalId":359446,"journal":{"name":"CCECE '97. Canadian Conference on Electrical and Computer Engineering. Engineering Innovation: Voyage of Discovery. Conference Proceedings","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Rapid prototyping of modular/hypercube trellis decoders for communication systems\",\"authors\":\"L. Pouliot, P. Fortier\",\"doi\":\"10.1109/CCECE.1997.614795\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work, we look at a novel approach for the realization of a fully parallel decoder based on the Viterbi algorithm and hypercube architecture using a rapid prototyping method on FPGAs. Our proposed modular/hypercube architecture allows optimization of the surface by connecting modules together in such a way that a minimum of interconnections between modules is needed. Further optimization is possible using temporal multiplexing.\",\"PeriodicalId\":359446,\"journal\":{\"name\":\"CCECE '97. Canadian Conference on Electrical and Computer Engineering. Engineering Innovation: Voyage of Discovery. Conference Proceedings\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-05-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"CCECE '97. Canadian Conference on Electrical and Computer Engineering. Engineering Innovation: Voyage of Discovery. Conference Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CCECE.1997.614795\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"CCECE '97. Canadian Conference on Electrical and Computer Engineering. Engineering Innovation: Voyage of Discovery. Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CCECE.1997.614795","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

在这项工作中，我们研究了一种基于Viterbi算法和超立方体架构的全并行解码器的新方法，该方法使用fpga上的快速原型设计方法。我们提出的模块化/超立方体架构可以通过将模块连接在一起来优化表面，从而使模块之间的互连最小化。使用时间复用可以进一步优化。

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Rapid prototyping of modular/hypercube trellis decoders for communication systems

In this work, we look at a novel approach for the realization of a fully parallel decoder based on the Viterbi algorithm and hypercube architecture using a rapid prototyping method on FPGAs. Our proposed modular/hypercube architecture allows optimization of the surface by connecting modules together in such a way that a minimum of interconnections between modules is needed. Further optimization is possible using temporal multiplexing.

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CCECE '97. Canadian Conference on Electrical and Computer Engineering. Engineering Innovation: Voyage of Discovery. Conference Proceedings

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