Effective Realization of Ternary Logic Circuits by Adapted Map Minimization Method

This paper is dedicated to the circuit realization and synthesis of two-variable ternary functions. The new method makes amendments to some existing techniques, and puts them together for the systematic design of arbitrary ternary functions. An adapted ternary map method and a transistor mapping table are suggested. Some examples are provided to compare the new synthesis approach with the previous techniques. They show how effective the proposed method is.