一种与技术无关的块提取算法

F. Luellau, T. Hoepken, E. Barke
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引用次数: 29

摘要

功能块提取是集成电路版图验证的有效工具。特别是,它通过将网络比较问题转移到更高的层次结构来简化网络比较问题。本文描述了一个名为BLEX (Block Extractor)的计算机程序,它能够从类似spice的网络描述中提取任何给定的电路块,例如门、触发器、存储单元、差分放大器、达林顿电路等。该算法完全独立于技术。块的大小不受任何限制。与网络描述格式相同的功能块描述由用户提供。要检查的电路通常是由先前的电路提取得到的结果。提取器和BLEX是布局验证系统ALAS (A layout Analysis system)的组成部分。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Technology Independent Block Extraction Algorithm
Functional block extraction is a useful tool for layout verification of integrated circuits. In particular, it facilitates the network comparison problem by transfering it to a higher level of hierarchy. This paper describes a computer program called BLEX (Block Extractor), which is able to extract any given circuit block, e.g., gates, flip-flops, memory cells, differential amplifiers, darlington circuits etc., from a SPICE-like network description. The algorithm is fully technology independent. The size of the blocks is not subject to any restrictions. Descriptions of the functional blocks having the same format as the network description are supplied by the user. The circuit to be examined results usually from a preceding circuit extraction. The extractor and BLEX are part of the layout verification system ALAS (A Layout Analysis System).
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