全集成5mhz - if数字调频解调器

Minyoung Song, Jaejin Park, Euro Joe, M. Choe, B. Song
{"title":"全集成5mhz - if数字调频解调器","authors":"Minyoung Song, Jaejin Park, Euro Joe, M. Choe, B. Song","doi":"10.1109/CICC.1997.606681","DOIUrl":null,"url":null,"abstract":"A 5 MHz-IF digital FM demodulator integrated with a 4th-order bandpass delta-sigma front-end exhibits 74.7 dB SNR, -80.7 dB THD, and 61 dB AM rejection within a 9 kHz message bandwidth. The 0.65 /spl mu/m CMOS chip occupies 3.5 mm/spl times/3.5 mm of active area and consumes 180 mW with 4 V supply and 20 MHz clock.","PeriodicalId":111737,"journal":{"name":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","volume":"335 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A fully-integrated 5 MHz-IF digital FM demodulator\",\"authors\":\"Minyoung Song, Jaejin Park, Euro Joe, M. Choe, B. Song\",\"doi\":\"10.1109/CICC.1997.606681\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 5 MHz-IF digital FM demodulator integrated with a 4th-order bandpass delta-sigma front-end exhibits 74.7 dB SNR, -80.7 dB THD, and 61 dB AM rejection within a 9 kHz message bandwidth. The 0.65 /spl mu/m CMOS chip occupies 3.5 mm/spl times/3.5 mm of active area and consumes 180 mW with 4 V supply and 20 MHz clock.\",\"PeriodicalId\":111737,\"journal\":{\"name\":\"Proceedings of CICC 97 - Custom Integrated Circuits Conference\",\"volume\":\"335 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-05-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of CICC 97 - Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1997.606681\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1997.606681","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

一个集成了4阶带通delta-sigma前端的5mhz - if数字调频解调器在9 kHz消息带宽内具有74.7 dB信噪比,-80.7 dB THD和61 dB AM抑制。0.65 /spl mu/m的CMOS芯片占用3.5 mm/spl倍/3.5 mm的有源面积,在4 V电源和20 MHz时钟下消耗180 mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A fully-integrated 5 MHz-IF digital FM demodulator
A 5 MHz-IF digital FM demodulator integrated with a 4th-order bandpass delta-sigma front-end exhibits 74.7 dB SNR, -80.7 dB THD, and 61 dB AM rejection within a 9 kHz message bandwidth. The 0.65 /spl mu/m CMOS chip occupies 3.5 mm/spl times/3.5 mm of active area and consumes 180 mW with 4 V supply and 20 MHz clock.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信