利用CNN对印刷电路板布局上的断路和短路进行光学检测

1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96) Pub Date : 1996-06-24 DOI:10.1109/CNNA.1996.566498

P. Szolgay, K. Tomordi

{"title":"利用CNN对印刷电路板布局上的断路和短路进行光学检测","authors":"P. Szolgay, K. Tomordi","doi":"10.1109/CNNA.1996.566498","DOIUrl":null,"url":null,"abstract":"The printed circuit board layout inspection methods are mostly based on local geometric information, therefore it is well suited to the cellular neural network (CNN) paradigm. Two layout errors are detected here namely, the breaks in the wires and some kind of short circuits. The designed analogic algorithms to solve the problems above were tested on real life examples using an experimental system based on our CNN-HAC1M digital multiprocessor add-on-board, with 1 million cell space and 2.0 /spl mu/s/cell/iteration speed.","PeriodicalId":222524,"journal":{"name":"1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Optical detection of breaks and short circuits on the layouts of printed circuit boards using CNN\",\"authors\":\"P. Szolgay, K. Tomordi\",\"doi\":\"10.1109/CNNA.1996.566498\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The printed circuit board layout inspection methods are mostly based on local geometric information, therefore it is well suited to the cellular neural network (CNN) paradigm. Two layout errors are detected here namely, the breaks in the wires and some kind of short circuits. The designed analogic algorithms to solve the problems above were tested on real life examples using an experimental system based on our CNN-HAC1M digital multiprocessor add-on-board, with 1 million cell space and 2.0 /spl mu/s/cell/iteration speed.\",\"PeriodicalId\":222524,\"journal\":{\"name\":\"1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96)\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-06-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CNNA.1996.566498\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CNNA.1996.566498","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 7

摘要

印刷电路板布局检测方法大多基于局部几何信息，因此非常适合于细胞神经网络(CNN)范式。这里检测到两种布局错误，即电线断线和某种形式的短路。设计的模拟算法在基于CNN-HAC1M数字多处理器板载的实验系统上进行了实际实例测试，该实验系统具有100万单元空间和2.0 /spl mu/s/cell/迭代速度。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Optical detection of breaks and short circuits on the layouts of printed circuit boards using CNN

The printed circuit board layout inspection methods are mostly based on local geometric information, therefore it is well suited to the cellular neural network (CNN) paradigm. Two layout errors are detected here namely, the breaks in the wires and some kind of short circuits. The designed analogic algorithms to solve the problems above were tested on real life examples using an experimental system based on our CNN-HAC1M digital multiprocessor add-on-board, with 1 million cell space and 2.0 /spl mu/s/cell/iteration speed.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96)

自引率

0.00%

发文量