C. Germain, Jean-Luc Béchennec, D. Etiemble, J. Sansonnet
{"title":"一种用于大规模并行消息传递的多计算机的互连网络和路由方案","authors":"C. Germain, Jean-Luc Béchennec, D. Etiemble, J. Sansonnet","doi":"10.1109/FMPC.1990.89484","DOIUrl":null,"url":null,"abstract":"The communication system of a massively parallel architecture called MEGA is presented. The implications of massive parallelism for routing strategies and communication models are discussed. A routing strategy, called forced routing, is proposed. It minimizes contention by making full use of all the shortest paths in the network. Its performance has been studied by simulation, and the results are presented. The mixed communication model used allows processes with mutual reference to have direct information exchanges. The routing strategy can be implemented within a restricted chip area in CMOS technology.<<ETX>>","PeriodicalId":193332,"journal":{"name":"[1990 Proceedings] The Third Symposium on the Frontiers of Massively Parallel Computation","volume":"112 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"An interconnection network and a routing scheme for a massively parallel message-passing multicomputer\",\"authors\":\"C. Germain, Jean-Luc Béchennec, D. Etiemble, J. Sansonnet\",\"doi\":\"10.1109/FMPC.1990.89484\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The communication system of a massively parallel architecture called MEGA is presented. The implications of massive parallelism for routing strategies and communication models are discussed. A routing strategy, called forced routing, is proposed. It minimizes contention by making full use of all the shortest paths in the network. Its performance has been studied by simulation, and the results are presented. The mixed communication model used allows processes with mutual reference to have direct information exchanges. The routing strategy can be implemented within a restricted chip area in CMOS technology.<<ETX>>\",\"PeriodicalId\":193332,\"journal\":{\"name\":\"[1990 Proceedings] The Third Symposium on the Frontiers of Massively Parallel Computation\",\"volume\":\"112 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-10-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1990 Proceedings] The Third Symposium on the Frontiers of Massively Parallel Computation\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/FMPC.1990.89484\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1990 Proceedings] The Third Symposium on the Frontiers of Massively Parallel Computation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FMPC.1990.89484","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An interconnection network and a routing scheme for a massively parallel message-passing multicomputer
The communication system of a massively parallel architecture called MEGA is presented. The implications of massive parallelism for routing strategies and communication models are discussed. A routing strategy, called forced routing, is proposed. It minimizes contention by making full use of all the shortest paths in the network. Its performance has been studied by simulation, and the results are presented. The mixed communication model used allows processes with mutual reference to have direct information exchanges. The routing strategy can be implemented within a restricted chip area in CMOS technology.<>