采用混合1位全加法器电路的低功耗纹波进位加法器

2019 11th International Conference on Computational Intelligence and Communication Networks (CICN) Pub Date : 2019-01-01 DOI:10.1109/CICN.2019.8902351

A. Bagwari, Isha Katna

{"title":"采用混合1位全加法器电路的低功耗纹波进位加法器","authors":"A. Bagwari, Isha Katna","doi":"10.1109/CICN.2019.8902351","DOIUrl":null,"url":null,"abstract":"Full adder circuit has a vital role in applications such as microprocessors, microcontrollers and DSP architecture. The aim of this work to design low power Ripple carry adder using hybrid 1-bit full adder with small consumption of power and high performance. Performance parameters like power, delay and power-delay product (PDP) has been analyzed. To achieve the above-said objective, hybrid adders are designed in such a way with different topology than earlier ones. RCA has been designed in SPICE 90nm technology with 1.2 supply voltage.","PeriodicalId":329966,"journal":{"name":"2019 11th International Conference on Computational Intelligence and Communication Networks (CICN)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Low Power Ripple Carry Adder Using Hybrid 1-Bit Full Adder Circuit\",\"authors\":\"A. Bagwari, Isha Katna\",\"doi\":\"10.1109/CICN.2019.8902351\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Full adder circuit has a vital role in applications such as microprocessors, microcontrollers and DSP architecture. The aim of this work to design low power Ripple carry adder using hybrid 1-bit full adder with small consumption of power and high performance. Performance parameters like power, delay and power-delay product (PDP) has been analyzed. To achieve the above-said objective, hybrid adders are designed in such a way with different topology than earlier ones. RCA has been designed in SPICE 90nm technology with 1.2 supply voltage.\",\"PeriodicalId\":329966,\"journal\":{\"name\":\"2019 11th International Conference on Computational Intelligence and Communication Networks (CICN)\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 11th International Conference on Computational Intelligence and Communication Networks (CICN)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICN.2019.8902351\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 11th International Conference on Computational Intelligence and Communication Networks (CICN)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICN.2019.8902351","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 5

摘要

全加法器电路在微处理器、微控制器和DSP等应用中起着至关重要的作用。本工作的目的是采用混合1位全加法器设计低功耗纹波进位加法器，功耗小，性能好。分析了功率、时延和功率延迟积(PDP)等性能参数。为了实现上述目标，混合加法器的设计与以前的加法器具有不同的拓扑结构。RCA采用SPICE 90nm技术设计，电源电压为1.2。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Low Power Ripple Carry Adder Using Hybrid 1-Bit Full Adder Circuit

Full adder circuit has a vital role in applications such as microprocessors, microcontrollers and DSP architecture. The aim of this work to design low power Ripple carry adder using hybrid 1-bit full adder with small consumption of power and high performance. Performance parameters like power, delay and power-delay product (PDP) has been analyzed. To achieve the above-said objective, hybrid adders are designed in such a way with different topology than earlier ones. RCA has been designed in SPICE 90nm technology with 1.2 supply voltage.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2019 11th International Conference on Computational Intelligence and Communication Networks (CICN)

自引率

0.00%

发文量