集成80 v d类功率输出级，在0.14µm SOI BCD工艺中效率为94%

2013 Proceedings of the ESSCIRC (ESSCIRC) Pub Date : 2013-10-31 DOI:10.1109/ESSCIRC.2013.6649079

Haifeng Ma, R. V. D. Zee, B. Nauta

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引用次数: 8

摘要

本文提出了一种基于0.14μm soi的高效80V d类功率级设计。通过内部调节的浮动电源、栅极驱动器的可变驱动强度和高效的两步电平移位设计，实现了对片上电源反弹的免疫。在实现的芯片中，以94%的峰值效率实现了快速的开关转换和最小的开关损耗。

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An integrated 80-V class-D power output stage with 94% efficiency in a 0.14µm SOI BCD process

In this paper we present a highly-efficient 80V class-D power stage design in a 0.14μm SOI-based BCD process. Immunity to the on-chip supply bounce is realized by internally regulated floating supplies, variable driving strength for the gate driver, and an efficient 2-step level shifter design. Fast switching transition and minimized switching loss are achieved with a 94% peak efficiency in the realized chip.

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2013 Proceedings of the ESSCIRC (ESSCIRC)

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