{"title":"通过复杂的硬件/软件平台实现整体安全","authors":"Giuseppe Airò Farulla, P. Prinetto, A. Varriale","doi":"10.1109/DTIS.2017.7930156","DOIUrl":null,"url":null,"abstract":"This paper presents a methodology to implement holistic security systems on complex hardware and software platforms by means of a set of software APIs and conceptual abstraction layers which simplify both the security development and the security integration in existing infrastructures. To validate the methodology, all the hardware and software developments have been deployed on the SEcube™, an open security platform leveraging on a 3D SiP (System in Package) designed and produced by Blu5 Group, which integrates three key security elements in a single package: a fast floating-point Cortex-M4 CPU, a high-performance FPGA, and an EAL5+ certified Smart Card.","PeriodicalId":328905,"journal":{"name":"2017 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Holistic security via complex HW/SW platforms\",\"authors\":\"Giuseppe Airò Farulla, P. Prinetto, A. Varriale\",\"doi\":\"10.1109/DTIS.2017.7930156\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a methodology to implement holistic security systems on complex hardware and software platforms by means of a set of software APIs and conceptual abstraction layers which simplify both the security development and the security integration in existing infrastructures. To validate the methodology, all the hardware and software developments have been deployed on the SEcube™, an open security platform leveraging on a 3D SiP (System in Package) designed and produced by Blu5 Group, which integrates three key security elements in a single package: a fast floating-point Cortex-M4 CPU, a high-performance FPGA, and an EAL5+ certified Smart Card.\",\"PeriodicalId\":328905,\"journal\":{\"name\":\"2017 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-04-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DTIS.2017.7930156\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS.2017.7930156","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper presents a methodology to implement holistic security systems on complex hardware and software platforms by means of a set of software APIs and conceptual abstraction layers which simplify both the security development and the security integration in existing infrastructures. To validate the methodology, all the hardware and software developments have been deployed on the SEcube™, an open security platform leveraging on a 3D SiP (System in Package) designed and produced by Blu5 Group, which integrates three key security elements in a single package: a fast floating-point Cortex-M4 CPU, a high-performance FPGA, and an EAL5+ certified Smart Card.