用于0.1 /spl mu/m以下装置的P-SOG无空隙低应力浅沟隔离技术

2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303) Pub Date : 2002-06-11 DOI:10.1109/VLSIT.2002.1015422

J. Heo, Soo-jin Hong, D. Ahn, Hyun-Duk Cho, M. Park, K. Fujihara, U. Chung, Y. Oh, J. Moon

{"title":"用于0.1 /spl mu/m以下装置的P-SOG无空隙低应力浅沟隔离技术","authors":"J. Heo, Soo-jin Hong, D. Ahn, Hyun-Duk Cho, M. Park, K. Fujihara, U. Chung, Y. Oh, J. Moon","doi":"10.1109/VLSIT.2002.1015422","DOIUrl":null,"url":null,"abstract":"Highly reliable void free shallow trench isolation (VF-STI) technology by employing polysilazane based inorganic spin-on-glass (P-SOG) is developed for sub-0.1 /spl mu/m devices. In order to overcome the difficulties from the gap-filling and accumulated mechanical stress in STI, a P-SOG pillar is introduced at the trench bottom. As a result, the P-SOG pillar, having low stress, improves data retention time and hot carrier immunity in 256 Mbit DRAM by reducing cumulative STI stress. In addition, VF-STI shows an excellent extendibility in terms of gap filling capability even at an aspect ratio of more than 10 without void formation.","PeriodicalId":103040,"journal":{"name":"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Void free and low stress shallow trench isolation technology using P-SOG for sub 0.1 /spl mu/m device\",\"authors\":\"J. Heo, Soo-jin Hong, D. Ahn, Hyun-Duk Cho, M. Park, K. Fujihara, U. Chung, Y. Oh, J. Moon\",\"doi\":\"10.1109/VLSIT.2002.1015422\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Highly reliable void free shallow trench isolation (VF-STI) technology by employing polysilazane based inorganic spin-on-glass (P-SOG) is developed for sub-0.1 /spl mu/m devices. In order to overcome the difficulties from the gap-filling and accumulated mechanical stress in STI, a P-SOG pillar is introduced at the trench bottom. As a result, the P-SOG pillar, having low stress, improves data retention time and hot carrier immunity in 256 Mbit DRAM by reducing cumulative STI stress. In addition, VF-STI shows an excellent extendibility in terms of gap filling capability even at an aspect ratio of more than 10 without void formation.\",\"PeriodicalId\":103040,\"journal\":{\"name\":\"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)\",\"volume\":\"56 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-06-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2002.1015422\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2002.1015422","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 7

摘要

采用聚硅氮烷基无机自旋玻璃(P-SOG)，开发了用于0.1 /spl μ m以下器件的高可靠性无空隙浅沟隔离技术。为了克服STI中存在的填隙和机械应力积累的困难，在槽底引入了P-SOG柱。因此，P-SOG柱具有低应力，通过减少累积STI应力，提高了256 Mbit DRAM的数据保留时间和热载波抗扰度。此外，VF-STI在宽高比大于10时也表现出良好的空隙填充能力。

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Void free and low stress shallow trench isolation technology using P-SOG for sub 0.1 /spl mu/m device

Highly reliable void free shallow trench isolation (VF-STI) technology by employing polysilazane based inorganic spin-on-glass (P-SOG) is developed for sub-0.1 /spl mu/m devices. In order to overcome the difficulties from the gap-filling and accumulated mechanical stress in STI, a P-SOG pillar is introduced at the trench bottom. As a result, the P-SOG pillar, having low stress, improves data retention time and hot carrier immunity in 256 Mbit DRAM by reducing cumulative STI stress. In addition, VF-STI shows an excellent extendibility in terms of gap filling capability even at an aspect ratio of more than 10 without void formation.

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2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)

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