{"title":"40nm CMOS温度补偿电源复位电路","authors":"Yanfei Lin, Ken Xu","doi":"10.1109/EDSSC.2019.8754457","DOIUrl":null,"url":null,"abstract":"To improve the accuracy and eliminate the bandgap reference circuit of conventional POR (power-on-reset) circuits, a low-cost, low-power, temperature-compensated POR circuit with precise trigger voltage is presented in this paper. The proposed POR circuit was designed and implemented in a 40nm CMOS technology. It achieves a 740nA quiescent current under 1.1V power supply, a 0.008mm2 active area, and a 350ppm/°C trigger voltage temperature coefficient from -40°C to 120°C.","PeriodicalId":183887,"journal":{"name":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A Temperature-Compensated Power-on-Reset Circuit in 40nm CMOS\",\"authors\":\"Yanfei Lin, Ken Xu\",\"doi\":\"10.1109/EDSSC.2019.8754457\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To improve the accuracy and eliminate the bandgap reference circuit of conventional POR (power-on-reset) circuits, a low-cost, low-power, temperature-compensated POR circuit with precise trigger voltage is presented in this paper. The proposed POR circuit was designed and implemented in a 40nm CMOS technology. It achieves a 740nA quiescent current under 1.1V power supply, a 0.008mm2 active area, and a 350ppm/°C trigger voltage temperature coefficient from -40°C to 120°C.\",\"PeriodicalId\":183887,\"journal\":{\"name\":\"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)\",\"volume\":\"50 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDSSC.2019.8754457\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2019.8754457","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Temperature-Compensated Power-on-Reset Circuit in 40nm CMOS
To improve the accuracy and eliminate the bandgap reference circuit of conventional POR (power-on-reset) circuits, a low-cost, low-power, temperature-compensated POR circuit with precise trigger voltage is presented in this paper. The proposed POR circuit was designed and implemented in a 40nm CMOS technology. It achieves a 740nA quiescent current under 1.1V power supply, a 0.008mm2 active area, and a 350ppm/°C trigger voltage temperature coefficient from -40°C to 120°C.