{"title":"数字通信系统RS(7,5)数据编码电路的硬件设计","authors":"F. Diaconu, L. Scripcariu, P. Matasaru","doi":"10.1109/ISSCS.2017.8034890","DOIUrl":null,"url":null,"abstract":"We design a multilevel data encoder for digital communication systems. Time constraints are imposed for a lot of services provided on portable devices. Hardware solutions are preferred more than software algorithms when the processing time and the power consumption are critical. Powerful error-correction coders processing multi-bit symbols can be implemented as hardware solutions in order to reduce the running-time and the CPU resource consumption. We design a battery powered encoder and investigate the minimum bit period value allowed at its inputs, and the minimum voltage from power supply required for operation.","PeriodicalId":338255,"journal":{"name":"2017 International Symposium on Signals, Circuits and Systems (ISSCS)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Hardware design of an RS (7, 5) data coding circuit used by digital communication systems\",\"authors\":\"F. Diaconu, L. Scripcariu, P. Matasaru\",\"doi\":\"10.1109/ISSCS.2017.8034890\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We design a multilevel data encoder for digital communication systems. Time constraints are imposed for a lot of services provided on portable devices. Hardware solutions are preferred more than software algorithms when the processing time and the power consumption are critical. Powerful error-correction coders processing multi-bit symbols can be implemented as hardware solutions in order to reduce the running-time and the CPU resource consumption. We design a battery powered encoder and investigate the minimum bit period value allowed at its inputs, and the minimum voltage from power supply required for operation.\",\"PeriodicalId\":338255,\"journal\":{\"name\":\"2017 International Symposium on Signals, Circuits and Systems (ISSCS)\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 International Symposium on Signals, Circuits and Systems (ISSCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCS.2017.8034890\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International Symposium on Signals, Circuits and Systems (ISSCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCS.2017.8034890","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hardware design of an RS (7, 5) data coding circuit used by digital communication systems
We design a multilevel data encoder for digital communication systems. Time constraints are imposed for a lot of services provided on portable devices. Hardware solutions are preferred more than software algorithms when the processing time and the power consumption are critical. Powerful error-correction coders processing multi-bit symbols can be implemented as hardware solutions in order to reduce the running-time and the CPU resource consumption. We design a battery powered encoder and investigate the minimum bit period value allowed at its inputs, and the minimum voltage from power supply required for operation.
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