{"title":"全耗尽双栅FinFET的子电路模型,包括氧化物和界面捕获电荷的影响","authors":"Tatjana Pesic-Brdjanin, N. Jankovic","doi":"10.1109/EUROCON.2015.7313741","DOIUrl":null,"url":null,"abstract":"In this paper, a method for including the effects of oxide and interface trapped charge in standard SPICE model of fully-depleted double-gate FinFET is described. It is based on the auxiliary sub-circuit connected in series with the gate input of FinFET which accounts for the bias-dependent voltage shifts due to the trapped charge. The sub-circuit model efficiency is verified using two-dimensional TCAD device simulations.","PeriodicalId":133824,"journal":{"name":"IEEE EUROCON 2015 - International Conference on Computer as a Tool (EUROCON)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Sub-sircuit model of fully-depleted double-gate FinFET including the effects of oxide and interface trapped charge\",\"authors\":\"Tatjana Pesic-Brdjanin, N. Jankovic\",\"doi\":\"10.1109/EUROCON.2015.7313741\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a method for including the effects of oxide and interface trapped charge in standard SPICE model of fully-depleted double-gate FinFET is described. It is based on the auxiliary sub-circuit connected in series with the gate input of FinFET which accounts for the bias-dependent voltage shifts due to the trapped charge. The sub-circuit model efficiency is verified using two-dimensional TCAD device simulations.\",\"PeriodicalId\":133824,\"journal\":{\"name\":\"IEEE EUROCON 2015 - International Conference on Computer as a Tool (EUROCON)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE EUROCON 2015 - International Conference on Computer as a Tool (EUROCON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EUROCON.2015.7313741\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE EUROCON 2015 - International Conference on Computer as a Tool (EUROCON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EUROCON.2015.7313741","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Sub-sircuit model of fully-depleted double-gate FinFET including the effects of oxide and interface trapped charge
In this paper, a method for including the effects of oxide and interface trapped charge in standard SPICE model of fully-depleted double-gate FinFET is described. It is based on the auxiliary sub-circuit connected in series with the gate input of FinFET which accounts for the bias-dependent voltage shifts due to the trapped charge. The sub-circuit model efficiency is verified using two-dimensional TCAD device simulations.